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ISL9307IRTWCWNZ-T Datasheet(PDF) 7 Page - Intersil Corporation |
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ISL9307IRTWCWNZ-T Datasheet(HTML) 7 Page - Intersil Corporation |
7 / 13 page ISL9307 7 FN7931.3 September 20, 2012 Theory of Operation DCD1 and DCD2 Both the DCD1 and DCD2 converters on ISL9307 use the peak-current-mode pulse-width modulation (PWM) control scheme for fast transient response and pulse-by-pulse current limiting. Both converters are able to supply up to 1500mA load current. Under light load conditions, the device enters a pulse-skipping mode to minimize switching loss by reducing switching frequency. Figure 2 illustrates the skip mode operation. A zero-cross sensing circuit monitors the current flowing through the SW node for zero crossing. When it is detected to cross zero for 16 consecutive cycles, the regulator enters skip mode. During the 16 consecutive cycles, the inductor current could be negative. The counter is reset to zero when the sensed current flowing through the SW node does not cross zero during any cycle within the 16 consecutive cycles. Once the converter enters skip mode, the pulse modulation is controlled by an internal comparator while each pulse cycle remains synchronized to the PWM clock. The P-channel MOSFET is turned on at the rising edge of the clock and turned off when its current reaches ~20% of the peak current limit. As the average inductor current in each cycle is higher than the average current of the load, the output voltage rises cycle-over- cycle. When the output voltage is sensed to reach 1.5% above its nominal voltage, the P-channel MOSFET is turned off immediately, and the inductor current is fully discharged to zero and stays at zero. The output voltage reduces gradually due to the load current discharging the output capacitor. When the output voltage drops to the nominal voltage, the P-channel MOSFET turns on again, repeating the previous operations. The regulator resumes normal PWM mode operation when the output voltage is sensed to drop below 1.5% of its nominal voltage value, as shown in Figure 3. 16 CYCLES CLOCK IL VOUT 0 VOUT_NOMINAL 20% PEAK CURRENT LIMIT 1.015*VOUT_NOMINAL FIGURE 2. SKIP MODE OPERATION WAVEFORMS vEAMP d iL vOUT vCSA FIGURE 3. PWM OPERATION WAVEFORMS |
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