U74HCT7046L-P16-R datasheet(7/16 Pages) UTC

Part #	U74HCT7046L-P16-R

Description	PHASE LOCKED LOOP WITH VCO & LOCK DETECTOR

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Manufacturer	UTC [Unisonic Technologies]

Direct Link	http://www.utc-ic.com

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U74HCT7046

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

7 of 16

www.unisonic.com.tw

QW-R502-851.A

DC CHARACTERISTICS (Cont.)

VCO Section

(Voltages are Referenced to GND, Ground=0V)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNIT

HIGH Level Input Voltage INH

VIH

VCC=4.5V~5.5V

2

1.6

V

LOW Level Input Voltage INH

VIL

VCC=4.5V~5.5V

1.2 0.8

V

HIGH Level Output Voltage VCOOUT

VOH

VI=VIH or VIL

VCC=4.5V, -IOUT = 20μA

4.4

4.5

V

HIGH Level Output Voltage VCOOUT

VOH

VCC=4.5V, -IOUT = 4.0 Ma

VI=VIH or VIL

3.9

4.3

V

LOW Level Output Voltage VCOOUT

VOL

VI=VIH or VIL

VCC=4.5V, IOUT = 20μA

0

0.1

V

LOW Level Output Voltage VCOOUT

VOL

VI=VIH or VIL

VCC=4.5V, IOUT = 4.0 mA

0.1

5

0.26

V

LOW Level Output Voltage C1A, C1B

VOL

VI=VIH or VIL

VCC=4.5V, IOUT = 4.0 mA

0.4

V

Input Leakage Current(INH, VCOIN)

±IIN

VCC=5.5V, VI=GND to VCC

±0.1

μA

Resistance Range

R1 / R2

VCC=4.5V (Note1)

3.0

300

kΩ

Capacitor Range

C1

VCC=4.5V (no limit Max.)

40

pF

Operating Voltage Range at VCOIN

VVCOIN

VCC=4.5V, Over the range

specified for R1; for linearity

(Fig10)

1.1

3.4

V

Note: 1. The parallel value of R1 and R2 should be more than 2.7 kΩ. Optimum performance is achieved when

R1 and/ or R2 are/is>10 kΩ.

Demodulator Section

(Voltages are Referenced to GND (Ground=0V))

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNIT

Resistor Range

RS

VCC=4.5V, At RS>300kΩ

the leakage current can influence

VDEMOUT

50

300 kΩ

Offset Voltage VCOIN to VDEMOUT

VOFF

VCC=4.5V, VI = VVCOIN =1/2 VCC,

values taken over RS range

±20

mV

Dynamic Output Resistance at DEMOUT

RD

VCC=4.5V, VDEMOUT = 1/2 VCC

25

Ω

AC CHARACTERISTICS (TA =25°C , unless otherwise specified)

Phase Comparator Section

(GND=0V, tR=tF=6ns, CL=50pF)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNIT

Propagation Delay SIGIN,

COMPIN to PC1OUT

tPHL/ tPLH

VCC=4.5V (Fig.8)

21

40

ns

Output Transition time

tTHL/ tTLH

VCC=4.5V (Fig.8)

7

15

ns

3-State Output Enable Time

SIGIN, COMPIN to PC2OUT

tPZH/ tPZL

VCC=4.5V (Fig.9)

27

56

ns

3-State Output Disable Time

SIGIN, COMPIN to PC2OUT

tPHZ/ tPLZ

VCC=4.5V (Fig.9)

35

65

ns

AC Coupled Input Sensitivity

(Peak-To-Peak Value) at SIGIN or COMPIN

VIN(P-P)

VCC=4.5V (fi = 1MHz)

15

mV

VCO Section

(GND=0V, tR=tF=6ns, CL=50pF)

PARAMETER

SYMBOL

TEST CONDITIONS

MIN TYP MAX UNIT

Frequency Stability with

Temperature Change

Δf/T

VCC=4.5V, VIN=VVCOIN=1/2 VCC,

R1=100 KΩ; R2=∞; C1=100pF

0.15

%/K

VCO Centre Frequency

(duty Factor = 50%)

fo

VCC=4.5V, VVCOIN = 1/2 VCC,

R1=3KΩ, R2 =∞, C1=40pF

11

17

MHz

VCO Frequency Linearity

ΔfVCO

VCC=4.5V, R1=100kΩ,

R2=∞,C1=100pF (Fig.10)

0.4

%

Duty factor at VCOOUT

δVCO

VCC=4.5V

50

%

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