5

FN6838.1

September 8, 2015

Electrical Specifications

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

UNIT

INPUT CHARACTERISTICS

Input Offset Voltage

4

15

mV

Average Offset Voltage Drift (Note 4)

14 LD TSSOP, SOIC package

7

µV/°C

16 LD QFN package

2

µV/°C

Input Bias Current

2

50

nA

Input Impedance

1G



Input Capacitance

2pF

CMIR

Common-Mode Input Range

-0.5

+18.5

V

CMRR

Common-Mode Rejection Ratio

53

78

dB

Open Loop Gain

0.5V

75

90

dB

OUTPUT CHARACTERISTICS

Output Swing Low

100

150

mV

Output Swing High

17.85

17.90

V

Short Circuit Current

±200

mA

Output Current

±70

mA

POWER SUPPLY PERFORMANCE

Supply Voltage Range

4.5

19

V

Supply Current (Per Amplifier)

550

750

µA

PSRR

Power Supply Rejection Ratio

Supply is moved from 4.5V to 19V60

75

dB

DYNAMIC PERFORMANCE

SR

Slew Rate (Note 5)

1V

12

V/µs

Settling to +0.1% (Note 6)

500

ns

BW

-3dB Bandwidth

12

MHz

GBWP

Gain-Bandwidth Product

8MHz

PM

Phase Margin

50

°

CS

Channel Separation

f = 5MHz

75

dB

NOTES:

“Typical Performance Curves” on page 6

5. Typical slew rate is an average of the slew rates measured on the rising (20%-80%) and the falling (80%-20%) edges of the output signal.

6. Settling time measured as the time from when the output level crosses the final value on rising/falling edge to when the output level settles within

a ±0.1% error band. The range of the error band is determined by: Final Value(V)±[Full Scale(V)*0.1%]

EL5420T