4

P/N:PM0243

REV. 3.0, JUL. 08, 2005

MX23L1610

AC Test Conditions

Input Pulse Levels

0.4V~ 2.4V

Input Rise and Fall Times

10ns

Input Timing Level

1.4V

Output Timing Level

1.4V

Output Load

See Figure

TIMING DIAGRAM

RANDOM READ

Note:

No output loading is present in tester load board.

Active loading is used and under software programming control.

Output loading capacitance includes load board's and all stray capacitance.

DOUT

C<100pF

IOL (load)=1.6mA

IOH (load)=-0.4mA

tACE

tAA

tOH

tHZ

ADD

ADD

ADD

ADD

CE

OE

DATA

Note:CE, OE are enable

VALID

VALID

VALID

tRC

tOE

AC CHARACTERISTICS (Ta = 0

° C ~ 70° C, VCC = 3.0V~3.6V)

Item

Symbol 23L1610-70

23L1610-90

23L1610-10

23L1610-12

23L1610-15

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Read Cycle Time

tRC

70ns

-

90ns

-

100ns

-

120ns

-

150ns -

Address Access Time

tAA

-

70ns

-

90ns

-

100ns

-

120ns

-

150ns

Chip Enable Access Time

tACE

-

70ns

-

90ns

-

100ns

-

120ns

-

150ns

Output Enable Time

tOE

-

35ns

-

45ns

-

50ns

-

60ns

-

70ns

Output Hold After Address tOH

0ns

-

0ns

-

0ns

-

0ns

-

0ns

-

Output High Z Delay

tHZ

-

20ns

-

20ns

-

20ns

-

20ns

-

20ns

Note:Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by

design over the full voltage and temperature operating range - not tested.