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MX26L1620XAC-90 Datasheet(PDF) 11 Page - Macronix International |
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MX26L1620XAC-90 Datasheet(HTML) 11 Page - Macronix International |
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11 / 36 page  11 P/N:PM0827 REV. 0.4, JAN. 31, 2002 MX26L1620 READING ARRAY DATA The device is automatically set to reading array data after device power-up. No commands are required to retrieve data.The device is also ready to read array data after completing an Automatic Program or Automatic Erase algorithm. The system must issue the reset command to re-en- able the device for reading array data if Q5 goes high, or while in the autoselect mode. See the "Reset Command" section, next. RESET COMMAND Writing the reset command to the device resets the device to reading array data. Address bits are don't care for this command. The reset command may be written between the se- quence cycles in an erase command sequence before erasing begins. This resets the device to reading array data. Once erasure begins, however, the device ignores reset commands until the operation is complete. The reset command may be written between the se- quence cycles in a program command sequence before programming begins. This resets the device to reading array data. Once programming begins,however, the device ignores reset commands until the operation is complete. The reset command may be written between the se- quence cycles in an SILICON ID READ command sequence. Once in the SILICON ID READ mode, the reset command must be written to return to reading array data. If Q5 goes high during a program or erase operation, writing the reset command returns the device to reading array data. SILICON ID READ COMMAND SEQUENCE The SILICON ID READ command sequence allows the host system to access the manufacturer and devices codes, and determine whether or not. Table 4 shows the address and data requirements. This method is an alternative to that shown in Table 1, which is intended for EPROM programmers and requires VID on address bit A9. The SILICON ID READ command sequence is initiated by writing two unlock cycles, followed by the SILICON ID READ command. The device then enters the SILICON ID READ mode, and the system may read at any address any number of times, without init iating another command sequence. A read cycle at address XX00h retrieves the manufacturer code. A read cycle at address XX01h re- turns the device code. The system must write the reset command to exit the autoselect mode and return to reading array data. WORD PROGRAM COMMAND SEQUENCE The command sequence requires four bus cycles, and is initiated by writing two unlock write cycles, followed by the program set-up command. The program address and data are written next, which in turn initiate the Embedded Program algorithm.The system is not required to provide fur ther controls or timings. The device automatically generates the program pulses and verifies the programmed cell margin. Table 4 shows the address and data requirements for the byte program command sequence. When the Embedded Program algorithm is complete, the device then returns to reading array data and addresses are no longer latched. The system can determine the status of the program operation by using Q7, Q6. See "Write Operation Status" for information on these status bits. Any commands written to the device during the Em- bedded Program Algorithm are ignored. Note that a hardware reset immediately terminates the programming operation. The Word Program command sequence should be reinitiated once the device has reset to reading array data, to ensure data integrity. Programming is allowed in any sequence. A bit cannot be programmed from a "0" back to a "1". Cause the Data Polling algorithm to indicate the operation was successful. However, a succeeding read will show that the data is still "0". Only erase operations can convert a "0" to a "1". ACCELERATED PROGRAM OPERATIONS The device offers accelerated program operations through the ACC pin. When the system asserts VHH on the ACC pin, the device automatically bypass the two "Unlock" write cycle. The device uses the higher voltage on the ACC pin to accelerate the operation. Note that the ACC pin must not be at VHH any operation other than accelerated programming, or device damage may result. |
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