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MX27C4111PC-12 Datasheet(PDF) 1 Page - Macronix International |
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MX27C4111PC-12 Datasheet(HTML) 1 Page - Macronix International |
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1 / 15 page  FEATURES • With Page Mode function, 8-word/16-byte page • 512K x 8 or 256K x 16 organization • +12.5V programming voltage • Fast access time: 90/100/120/150 ns • Page mode access time 50/60/75 ns • Totally static operation • Completely TTL compatible • Operating current: 60mA • Standby current: 100uA • Package type: - 40 pin plastic DIP - 40 pin SOP REV. 2.7, NOV. 19, 2002 P/N: PM0239 1 PIN CONFIGURATIONS PDIP/SOP BLOCK DIAGRAM GENERAL DESCRIPTION The MX27C4111 is a 4M-bit, One Time Programmable Read Only Memory with page mode. It is organized as 512K x 8 or 256K x 16, operates from a single + 5 volt supply, has a static standby mode, and features fast single address location programming. All programming signals are TTL levels, requiring a single pulse. For programming outside from the system, existing EPROM programmers may be used. The MX27C4111 supports a intelligent fast programming algorithm which can result in programming time of less than two minutes. MX27C4111 provides Page Read Access Mode which can greatly reduce the read access time. Normal read access time and Page Mode read access time is as fast as 90/50ns. It is designed to be compatible with all microprocessors and similar applications in which high perofmrance, large bit storage and simple interfacing are important design considerations. This EPROM is packaged in industry standard 40 pin dual-in-line packages and 40 pin SOP packages. MX27C4111 PRELIMINARY 4M-BIT [512K x8/256K x16] CMOS EPROM WITH PAGE MODE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE/VPP GND Q15/A-1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC A17 A7 A6 A5 A4 A3 A2 A1 A0 CE GND OE Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 CONTROL LOGIC OUTPUT BUFFERS Q0~Q14 Q15/A-1 CE OE BYTE/VPP A0~A17 ADDRESS INPUTS Y-DECODER X-DECODER Y-SELECT 4M BIT CELL MAXTRIX VCC GND . . . . . . . . . . . . . . . . |
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