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ISL62882IRTZ Datasheet(PDF) 4 Page - Intersil Corporation

Part # ISL62882IRTZ
Description  Multiphase PWM Regulator for IMVP-6.5™ Mobile CPUs and GPUs
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL62882IRTZ Datasheet(HTML) 4 Page - Intersil Corporation

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ISL62882, ISL62882B
4
FN6890.4
June 21, 2011
25
30
VCCP
Input voltage bias for the internal gate drivers. Connect +5V to the VCCP pin. Decouple with at
least 1µF of an MLCC capacitor to VSSP1 and VSSP2 pins respectively.
26
32
LGATE2
Output of the Phase-2 low-side MOSFET gate driver. Connect the LGATE2 pin to the gate of the
Phase-2 low-side MOSFET.
27
33
VSSP2
Current return path for the Phase-2 converter low-side MOSFET gate driver. Connect the VSSP2
pin to the source of the Phase-2 low-side MOSFET through a low impedance path, preferably in
parallel with the trace connecting the LGATE2 pin to the gate of the Phase-2 low-side MOSFET.
28
34
PHASE2
Current return path for the Phase-2 high-side MOSFET gate driver. Connect the PHASE2 pin to the
node consisting of the high-side MOSFET source, the low-side MOSFET drain, and the output
inductor of Phase-2.
29
35
UGATE2
Output of the Phase-2 high-side MOSFET gate driver. Connect the UGATE2 pin to the gate of the
Phase-2 high-side MOSFET.
30
36
BOOT2
Connect an MLCC capacitor across the BOOT2 and the PHASE2 pins. The boot capacitor is
charged through an internal boot diode connected from the VCCP pin to the BOOT2 pin, each
time the PHASE2 pin drops below VCCP minus the voltage dropped across the internal boot
diode.
31 thru 37
38 thru 44
VID0 thru VID6
VID input with VID0 = LSB and VID6 = MSB.
38
45
VR_ON
Voltage regulator enable input. A high level logic signal on this pin enables the regulator.
39
46
DPRSLPVR
Deeper sleep enable signal. A high level logic signal on this pin indicates that the microprocessor
is in deeper sleep mode.
40
47
CLK_EN#
Open drain output to enable system PLL clock. It goes low 13 switching cycles after Vcore is
within 10% of Vboot.
-48
NC
No connect.
pad
pad
BOTTOM
The bottom pad of ISL62882B is electrically connected to the GND pin inside the IC.
Functional Pin Descriptions (Continued)
ISL62882
ISL62882B
SYMBOL
DESCRIPTION


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