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ZL1505ALNNT Datasheet(PDF) 10 Page - Intersil Corporation |
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ZL1505ALNNT Datasheet(HTML) 10 Page - Intersil Corporation |
10 / 13 page ZL1505 10 FN6845.3 February 25, 2011 ZL1505 Overview Theory of Operation The ZL1505 is a synchronous N-channel MOSFET driver that is intended for use with Zilker Labs Digital-DC PWM controllers to enable a high-efficiency DC/DC conversion scheme. The patented Digital-DC control scheme utilizes a closed-loop algorithm to optimize the dead-time applied between the gate drive signals for the high-side and low-side MOSFETs. By monitoring the duty cycle of the resulting DC/DC converter circuit, this dynamic routine continuously varies the MOSFET dead times to optimize conversion efficiency in response to varying circuit conditions. The ZL1505’s dual PWM input configuration enables this optimization scheme to be applied while minimizing the complexity within the driver device. Please refer to the ZL2004 data sheet for details on the dynamic dead-time optimization routine. The ZL1505 integrates two powerful gate drivers that have been optimized for step-down DC/DC conversion circuit configurations whose output current can exceed 40A per phase. The ZL1505 also integrates a 30V bootstrap Schottky diode to minimize the external components and provide a high drive voltage to the high-side driver device. Variable Gate Drive Current The ZL1505 incorporates an innovative variable drive current scheme that enables the user to optimize the gate drive current levels to the requirements of the external MOSFETs used over a wide range of operating frequencies. Each of the gate drivers incorporates a logic input (HSEL and LSEL) that allows the user to select the gate drive strength to 50% or 100% of the total rated drive current. With the HSEL pin connected to the BST pin, the high-side driver can deliver the full rated gate drive current; with the HSEL pin connected to the SW pin, the output current will be limited to 50% of the full rated output capability. With the LSEL pin connected to VDD, the low-side driver can deliver the full rated gate drive current; with the LSEL pin connected to GND, the FIGURE 22. HIGH-SIDE DRIVER RISE TIME, tRH (CGH = 3nF, TA = +25°C) FIGURE 23. tRH WITH TEMPERATURE (CGH = 3nF, HSEL = BST) FIGURE 24. HIGH-SIDE DRIVER FALL TIME, tFH (CGH = 3nF, TA = +25°C) FIGURE 25. tFH WITH TEMPERATURE (CGH = 3nF, HSEL = BST) Typical Performance Curves Performance curves with temperature are measured at ambient temperatures (T A) of +85°C, +25°C, and -25°C. (Continued) VDD (V) 4.5 7.5 7.0 6.5 6.0 5.5 5.0 17.5 11.5 13.5 15.5 5.5 9.5 7.5 3.5 HSEL = SW HSEL = BST 4.5 7.5 7.0 6.5 6.0 5.5 5.0 VDD (V) 8.5 5.5 6.5 7.5 3.5 4.5 -25 °C +25 °C +85 °C 4.5 7.5 7.0 6.5 6.0 5.5 5.0 VDD (V) 11.5 5.5 7.5 9.5 3.5 HSEL = SW HSEL = BST 4.5 7.5 7.0 6.5 6.0 5.5 5.0 VDD (V) 7.5 4.5 5.5 6.5 3.5 -25 °C +25 °C +85 °C |
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