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X9221AUP Datasheet(PDF) 2 Page - Intersil Corporation |
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X9221AUP Datasheet(HTML) 2 Page - Intersil Corporation |
2 / 15 page Ordering Information PART NUMBER PART MARKING VCC LIMITS (V) RTOTAL (k) TEMP RANGE (°C) PACKAGE PKG. DWG. # X9221AYS X9221AYS 5 ±10% 2 0 to +70 20 Ld SOIC (300MIL) MDP0027 X9221AYSZ (Note) X9221AYS Z 0 to +70 20 Ld SOIC (300MIL) (Pb-Free) MDP0027 X9221AYSI* X9221AYSI -40 to +85 20 Ld SOIC (300MIL) MDP0027 X9221AYSIZ* (Note) X9221AYSI Z -40 to +85 20 Ld SOIC (300MIL) (Pb-Free) MDP0027 X9221AWS* X9221AWS 10 0 to +70 20 Ld SOIC (300MIL) MDP0027 X9221AWSZ* (Note) X9221AWS Z 0 to +70 20 Ld SOIC (300MIL) (Pb-Free) MDP0027 X9221AWSI* X9221AWSI -40 to +85 20 Ld SOIC (300MIL) MDP0027 X9221AWSIZ* (Note) X9221AWSI Z -40 to +85 20 Ld SOIC (300MIL) (Pb-Free) MDP0027 X9221AUP X9221AUP 50 0 to +70 20 Ld PDIP MDP0031 X9221AUPZ (Note) X9221AUPZ 0 to +70 20 Ld PDIP (Pb-Free) MDP0031 X9221AUPI X9221AUPI -40 to +85 20 Ld PDIP MDP0031 X9221AUPIZ (Note) X9221AUPIZ -40 to +85 20 Ld PDIP (Pb-Free) MDP0031 X9221AUSI* X9221AUSI -40 to +85 20 Ld SOIC (300MIL) MDP0027 X9221AUSIZ* (Note) X9221AUSI Z -40 to +85 20 Ld SOIC (300MIL) (Pb-Free) MDP0027 *Add "T1" suffix for tape and reel. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. VW0/RW0 VL0/RL0 VH0/RL0 A0 A2 VW1/RW1 VL1/RL1 VH1/RH1 SDA VSS 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC RES RES RES A1 A3 SCL RES RES RES DIP/SOIC X9221A 2 FN8163.2 August 30, 2006 PIN DESCRIPTIONS Host Interface Pins Serial Clock (SCL) The SCL input is used to clock data into and out of the X9221A. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device. It is an open drain output and may be wire-ORed with any number of open drain or open collector outputs. An open drain output requires the use of a pull-up resistor. For selecting typical val- ues, refer to the guidelines for calculating typical val- ues on the bus pull-up resistors graph. Address The Address inputs are used to set the least signifi- cant 4 bits of the 8-bit slave address. A match in the slave address serial data stream must be made with the Address input in order to initiate communication with the X9221A Potentiometer Pins VH/RH(VH0/RH0-VH1/RH1), VL/RL (VL0/RL0-VL1/RL1) The VH/RH and VL/RL inputs are equivalent to the ter- minal connections on either end of a mechanical potentiometer. VW/RW (VW0/RW0-VW1/RW1) The wiper outputs are equivalent to the wiper output of a mechanical potentiometer. PIN CONFIGURATION X9221A |
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