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X9251UV24IZ-2.7 Datasheet(PDF) 11 Page - Intersil Corporation

Part # X9251UV24IZ-2.7
Description  Single Supply/Low Power/256-Tap/SPI Bus, Quad Digitally-Controlled Potentiometer
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

X9251UV24IZ-2.7 Datasheet(HTML) 11 Page - Intersil Corporation

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X9251
11
FN8166.6
December 3, 2014
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Transfer Data Register (DR) to Wiper Counter Register (WCR)
Increment/Decrement Wiper Counter Register (WCR)
Read Status Register (SR)
CS FALLING
EDGE
DEVICE TYPE
IDENTIFIER
DEVICE
ADDRESSES
INSTRUCTION
OPCODE
DR AND WCR
ADDRESSES
CS RISING
EDGE
010
1
0
0
A1
A0
1
1
0
1
RB
RA
0
0
CS
FALLING
EDGE
DEVICE TYPE
IDENTIFIER
DEVICE
ADDRESSES
INSTRUCTION
OPCODE
WCR
ADDRESSES
INCREMENT/DECREMENT
(SENT BY MASTER ON SI)
CS
RISING
EDGE
0
1
0
1
0
0 A1 A0 00
10
X
X
0
0
I/D
I/D
.
.
.
.
I/D I/D
CS
FALLIN
G EDGE
DEVICE TYPE
IDENTIFIER
DEVICE
ADDRESSES
INSTRUCTION
OPCODE
WCR
ADDRESSES
DATA BYTE
(SENT BY X9251 ON SO)
CS
RISING
EDGE
0
1
0
1
0 0
A1
A0
0 1010001
0
0
0
0000
WIP
NOTES:
5. “A1 ~ A0”: stands for the device addresses sent by the master.
6. WPx refers to wiper position data in the Counter Register
7. “I”: stands for the increment operation, SI held HIGH during active SCK phase (high).
8. “D”: stands for the decrement operation, SI held LOW during active SCK phase (high).


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