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ZL6105ALAF Datasheet(PDF) 8 Page - Intersil Corporation |
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ZL6105ALAF Datasheet(HTML) 8 Page - Intersil Corporation |
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8 / 35 page  ZL6105 8 FN6906.5 December 19, 2013 Current Sense Input Bias Current (Vout Referenced, Vout < 4.0V) ISENA -1 – 1 µA ISENB -100 – 100 µA Soft-start Delay Duration Range Set using SS pin or resistor (Note 15) 5 – 30 ms Set using I2C/SMBus (Note 15) 0.005 – 500 s Soft-start Delay Duration Accuracy Turn-on delay (Note 15) - -0.25/+4 - ms Turn-off delay (Note 15) - -0.25/+4 - ms Soft-start Ramp Duration Range Set using SS pin or resistor 2 – 20 ms Set using I2C 0 – 200 ms Soft-start Ramp Duration Accuracy – 100 – µs Logic Input/Output Characteristics Logic Input Leakage Current EN, SCL, SDA pins -250 – 250 nA Logic Input Low, VIL – – 0.8 V Logic Input OPEN (N/C) Multi-mode logic pins – 1.4 – V Logic Input High, VIH 2.0 – – V Logic Output Low, VOL IOL ≤ 4mA (Note 20) – – 0.4 V Logic Output High, VOH IOH ≥ -2mA (Note 20) 2.25 – – V Oscillator and Switching Characteristics Switching Frequency Range 200 – 1400 kHz Switching Frequency Set-point Accuracy Predefined settings (See Table 11) -5 – 5 % Maximum Pwm Duty Cycle Factory default 95 – – % Minimum Sync Pulse Width 150 – – ns Input Clock Frequency Drift Tolerance External clock source -13 – 13 % Gate Drivers High-side driver voltage (VBST -VSW) – 4.5 – V High-side Driver Peak Gate Drive Current (Pull-down) (VBST -VSW) = 4.5V 2 3 – A High-side Driver Pull-up Resistance (VBST -VSW) = 4.5V, (VBST -VGH) = 50mV – 0.8 2 Ω High-side Driver Pull-down Resistance (VBST -VSW) = 4.5V, (VGH -VSW) = 50mV – 0.5 2 Ω Low-side Driver Peak Gate Drive Current (Pull-up) VR = 5V – 2.5 – A Low-side Driver Peak Gate Drive Current (Pull-down) VR = 5V – 1.8 – A Low-side Driver Pull-up Resistance VR = 5V, (VR -VGL) = 50mV – 1.2 2 Ω Low-side Driver Pull-down Resistance VR = 5V, (VGL -PGND) = 50mV – 0.5 2 Ω Switching Timing Gh Rise and Fall Time Gl Rise and Fall Time (VBST -VSW) = 4.5V, CLOAD = 2.2nF – 5 20 ns VR = 5V, CLOAD = 2.2nF – 5 20 ns Tracking VTRK Input Bias Current VTRK = 5.5V – 110 200 µA VTRK Tracking Ramp Accuracy 100% Tracking, VOUT -VTRK, no prebias -100 – + 100 mV VTRK Regulation Accuracy 100% Tracking, VOUT -VTRK -1 – 1 % Fault Protection Characteristics UVLO Threshold Range Configurable via I2C/SMBus 2.85 – 16 V UVLO Set-point Accuracy -150 – 150 mV UVLO Hysteresis Factory default – 3 – % Configurable via I2C/SMBus 0 – 100 % Electrical Specifications V DD = 12V, TA = -40°C to +85°C unless otherwise noted. Typical values are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER CONDITIONS MIN (Note 19) TYP MAX (Note 19) UNIT |
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