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IN82C55 Datasheet(PDF) 2 Page - IK Semicon Co., Ltd

Part # IN82C55
Description  Compatible with all Intel and Most Other Microprocessors
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Manufacturer  IKSEMICON [IK Semicon Co., Ltd]
Direct Link  http://www.iksemi.com/en/index.html
Logo IKSEMICON - IK Semicon Co., Ltd

IN82C55 Datasheet(HTML) 2 Page - IK Semicon Co., Ltd

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IN82C55A
Symbol
Pin
number
Type
Name and Function
PA
1-4
I/O
PORT A, PINS 0-3: Lower nibble of an 8-bit data output latch buffer
and an 8-bit data input latch.
3-0
5
I
READ CONTROL: This input is low during CPU read operations.
RD
6
I
CHIP SELECT: A low on this input enables the 82C55A to respond
to
CS
and
signals RD and WR are ignored otherwise.
RD
WR
GND
7
System Ground.
A
8-9
I
ADDRESS: These input signals in conjunction
and
RD
WR control
the selection of one of the three ports or the control word registers.
1-0
A
A
Input Operation (Read)
CS
RD
WR
1
0
0
0
0
1
0
Port A - Data Bus
0
1
0
1
0
Port B - Data Bus
1
0
0
1
0
Port C - Data Bus
1
1
0
1
0
Control Word - Data Bus
Output Operation (Write)
0
0
1
0
0
Data Bus - Port A
0
1
1
0
0
Data Bus - Port B
1
0
1
0
0
Data Bus - Port C
1
1
1
0
0
Data Bus – Control
Disable Function
x
x
x
x
1
Data Bus-3-State
x
x
1
1
0
Data Bus-3-State
PC
10-13
I/O
PORT C, PINS 4-7: Upper nibble of an 8-bit data output latch/buffer
and an 8-bit data input buffer (no latch for input). This port can be
divided into two 4-bit ports under the mode control. Each 4-bit port
contains a 4-bit latch and it can be used for the control signal outputs
and status signal inputs in conjunction with ports A and B.
7-4
PC
14-17
I/O
PORT C, PINS 0-3: Lower nibble of Port C.
0-3
PB
18-25
I/O
PORT B, PINS 0-7: An 8-bit data output latch/buffer and an 8-bit
data input buffer
0-7
VCC
26
SYSTEM POWER: +5V Power Supply
D
27-34
I/O
DATA BUS: Bi-directional, tri-state data bus lines, connected to
system data bus
7-0
RESET
35
I
RESET: A high on this input clears the control register and all ports
are set to the input mode
36
I
WRITE CONTROL: This input is low during CPU write operations
WR
PA
37-40
I/O
PORT A PINS 4-7: Upper nibble of an 8-bit data output latch/buffer
and an 8-bit data input latch
7-4
Rev. 00


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