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BUK9222-55A Datasheet(PDF) 3 Page - NXP Semiconductors |
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BUK9222-55A Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 13 page BUK9222-55A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 02 — 1 February 2011 3 of 13 NXP Semiconductors BUK9222-55A N-channel TrenchMOS logic level FET 4. Limiting values [1] peak drain current is limited by chip, not package. Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V VDGR drain-gate voltage RGS =20kΩ -55 V VGS gate-source voltage -15 15 V ID drain current Tmb =25°C; VGS =5V; see Figure 1; see Figure 3 -48 A Tmb =100 °C; VGS =5V; see Figure 1 -34 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 [1] - 193 A Ptot total power dissipation Tmb =25°C; see Figure 2 - 103 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb =25°C - 48 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 193 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID =48A; Vsup ≤ 55 V; RGS =50 Ω; VGS =5V; Tj(init) =25°C; nk; unclamped - 160 mJ Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature Tmb (°C) 0 200 150 50 100 03aa24 40 80 120 Ider (%) 0 Tmb (°C) 0 200 150 50 100 03aa16 40 80 120 Pder (%) 0 |
Similar Part No. - BUK9222-55A_15 |
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Similar Description - BUK9222-55A_15 |
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