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24C02A-IP Datasheet(PDF) 6 Page - Microchip Technology |
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24C02A-IP Datasheet(HTML) 6 Page - Microchip Technology |
6 / 12 page 24C01A/02A/04A DS11183D-page 6 © 1996 Microchip Technology Inc. FIGURE 6-1: BYTE WRITE FIGURE 6-2: PAGE WRITE S P BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY S T A R T S T O P CONTROL BYTE WORD ADDRESS DATA A C K A C K A C K S P BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY S T A R T CONTROL BYTE WORD ADDRESS (n) DATA n DATA n + 7 S T O P A C K A C K A C K A C K A C K DATA n + 1 7.0 ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the stop condition for a write com- mand has been issued from the master, the device ini- tiates the internally timed write cycle. ACK polling can be initiated immediately. This involves the master send- ing a start condition followed by the control byte for a write command (R/W = 0). If the device is still busy with the write cycle, then no ACK will be returned. If the cycle is complete, then the device will return the ACK and the master can then proceed with the next read or write command. See Figure 7-1 for flow diagram. FIGURE 7-1: ACKNOWLEDGE POLLING FLOW Send Write Command Send Stop Condition to Initiate Write Cycle Send Start Send Control Byte with R/W = 0 Did Device Acknowledge (ACK = 0)? Next Operation NO YES |
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