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24AA00T-SN Datasheet(PDF) 6 Page - Microchip Technology |
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24AA00T-SN Datasheet(HTML) 6 Page - Microchip Technology |
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6 / 18 page  24AA00/24LC00/24C00 DS21178D-page 6 2003 Microchip Technology Inc. 5.0 DEVICE ADDRESSING After generating a Start condition, the bus master transmits a control byte consisting of a slave address and a Read/Write bit that indicates what type of operation is to be performed. The slave address for the 24XX00 consists of a 4-bit device code ‘1010’ followed by three don't care bits. The last bit of the control byte determines the operation to be performed. When set to a one a read operation is selected, and when set to a zero a write operation is selected. (Figure 5-1). The 24XX00 monitors the bus for its corresponding slave address all the time. It generates an Acknowledge bit if the slave address was true and it is not in a Programming mode. FIGURE 5-1: CONTROL BYTE FORMAT 6.0 WRITE OPERATIONS 6.1 Byte Write Following the Start signal from the master, the device code (4 bits), the don't care bits (3 bits), and the R/W bit (which is a logic low) are placed onto the bus by the master transmitter. This indicates to the addressed slave receiver that a byte with a word address will follow after it has generated an Acknowledge bit during the ninth clock cycle. Therefore, the next byte transmit- ted by the master is the word address and will be written into the address pointer of the 24XX00. Only the lower four address bits are used by the device, and the upper four bits are don’t cares. The 24XX00 will acknowledge the address byte and the master device will then transmit the data word to be written into the addressed memory location. The 24XX00 acknowl- edges again and the master generates a Stop condition. This initiates the internal write cycle, and during this time the 24XX00 will not generate Acknowl- edge signals (Figure 7-2). After a byte Write command, the internal address counter will not be incremented and will point to the same address location that was just written. If a Stop bit is transmitted to the device at any point in the Write command sequence before the entire sequence is complete, then the command will abort and no data will be written. If more than 8 data bits are transmitted before the Stop bit is sent, then the device will clear the previously loaded byte and begin loading the data buffer again. If more than one data byte is transmitted to the device and a Stop bit is sent before a full eight data bits have been transmitted, then the Write command will abort and no data will be written. The 24XX00 employs a VCC threshold detector circuit which disables the internal erase/write logic if the VCC is below 1.5V (24AA00 and 24LC00) or 3.8V (24C00) at nominal conditions. 10 1 0 X X X SACK R/W Device Select Bits Don’t Care Bits Slave Address Acknowledge Bit Start Bit Read/Write Bit |
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