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27C256-20L Datasheet(PDF) 6 Page - Microchip Technology

Part # 27C256-20L
Description  256K (32K x 8) CMOS EPROM
Download  12 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

27C256-20L Datasheet(HTML) 6 Page - Microchip Technology

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27C256
DS11001L-page 6
© 1996 Microchip Technology Inc.
1.3
Standby Mode
The standby mode is defined when the CE pin is high
(VIH) and a program mode is not defined.
When these conditions are met, the supply current will
drop from 20 mA to 100
µA.
1.4
Output Enable
This feature eliminates bus contention in multiple bus
microprocessor systems and the outputs go to a high
impedance when the following condition is true:
• The OE pin is high and the program mode is not
defined.
1.5
Erase Mode (U.V. Windowed Versions)
Windowed products offer the ability to erase the mem-
ory array. The memory matrix is erased to the all 1’s
state when exposed to ultraviolet light. To ensure com-
plete erasure, a dose of 15 watt-second/cm2 is
required. This means that the device window must be
placed within one inch and directly underneath an ultra-
violet lamp with a wavelength of 2537 Angstroms,
intensity of 12,000
µW/cm2 for approximately 20 min-
utes.
1.6
Programming Mode
The Express Algorithm has been developed to improve
on the programming throughput times in a production
environment. Up to ten 100-microsecond pulses are
applied until the byte is verified. No overprogramming
is required. A flowchart of the express algorithm is
shown in Figure 1-3.
Programming takes place when:
a)
VCC is brought to the proper voltage,
b)
VPP is brought to the proper VH level,
c)
the OE pin is high, and
d)
the CE pin is low.
Since the erased state is “1” in the array, programming
of “0” is required. The address to be programmed is set
via pins A0-A14 and the data to be programmed is pre-
sented to pins O0-O7. When data and address are sta-
ble, a low going pulse on the CE line programs that
location.
1.7
Verify
After the array has been programmed it must be veri-
fied to ensure all the bits have been correctly pro-
grammed. This mode is entered when all the following
conditions are met:
a)
VCC is at the proper level,
b)
VPP is at the proper VH level,
c)
the CE line is high, and
d)
the OE line is low.
1.8
Inhibit
When programming multiple devices in parallel with dif-
ferent data, only CE need be under separate control to
each device. By pulsing the CE line low on a particular
device, that device will be programmed; all other
devices with CE held high will not be programmed with
the data, although address and data will be available on
their input pins.
1.9
Identity Mode
In this mode specific data is output which identifies the
manufacturer as Microchip Technology Inc. and device
type. This mode is entered when Pin A9 is taken to VH
(11.5V to 12.5V). The CE and OE lines must be at VIL.
A0 is used to access any of the two non-erasable bytes
whose data appears on O0 through O7.
Pin
Input
Output
Identity
A0
0
7
O
6
O
5
O
4
O
3
O
2
O
1
O
0
H
e
x
Manufacturer
Device Type*
VIL
VIH
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
29
8C
* Code subject to change


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