BTS6110-1SJA

Power Stage

Data Sheet

9

Rev. 1.1, 2014-11-24

6

Power Stage

The power stage is built using an N-channel vertical power MOSFET (DMOS) with charge pump.

6.1

Output ON-state Resistance

terms of temperature for the typical ON-state resistance. The behavior in reverse polarity is described in

Chapter 7.2

.

Figure 8

Typical ON-state Resistance

6.2

Turn ON/OFF Characteristics with Resistive Load

A low voltage event at the OUT pin causes the power DMOS to switch ON with a dedicated slope, optimized in

terms of Electro Magnetic Emission.

Chapter 7.2

shows the typical timing when switching a resistive load.

Figure 9

Switching a Resistive Load Timing

-40

-20

0

20

40

60

80

100

120

140

160

40

60

80

100

120

140

160

180

temp [°C]

typical R

DS(ON)

with V

CHI

typical R

DS(ON)

with V

CLO

BTS6110-1EJA

t

Switching times .vsd