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IFX1763 Datasheet(PDF) 6 Page - Infineon Technologies AG |
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IFX1763 Datasheet(HTML) 6 Page - Infineon Technologies AG |
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6 / 31 page  Data Sheet 6 Rev. 1.1, 2014-10-30 IFX1763 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 (DSO-8 EP) 1,2 (TSON-10) OUT Output. Supplies power to the load. For this pin a minimum output capacitor of 3.3 µF is required to prevent oscillations. Larger output capacitors may be required for applications with large transient loads in order to limit peak voltage transients or when the regulator is applied in conjunction with a bypass capacitor. For more details please refer to the section “Application Information” on Page 24. 2 (DSO-8 EP) 4 (TSON-10) SENSE (fix voltage version) Output Sense. For the fixed voltage version the SENSE pin is the input to the error amplifier. This allows to achieve an optimized regulation performance in case of small voltage drops R p that occur between regulator and load. In applications where such drops are relevant they can be eliminated by connecting the SENSE pin directly at the load. In standard configurations the SENSE pin can be connected directly to the OUT pin. For further details please refer to the section “Kelvin Sense Connection” on Page 25. 2 (DSO-8 EP) 4 (TSON-10) ADJ (adjustable version) Adjust. For the adjustable version the ADJ pin is the input to the error amplifier. The ADJ pin voltage is 1.22V referenced to ground and allows an output voltage range from 1.22V to 20V - V DR. The ADJ pin is internally clamped to ±7 V. Please note that the bias current of the ADJ pin is flowing into the pin.1) 3, 7 (DSO-8 EP) 3, 8 (TSON-10) NC No Connect. The NC Pins have no connection to any internal circuitry. Connect either to GND or leave open. 4 (DSO-8) 5 (TSON-10) BYP Bypass. The BYP pin is used to bypass the reference of the IFX1763 to achieve low noise performance. The BYP-pin is clamped internally to ±0.6 V (i.e. one V BE). A small capacitor from the output to the BYP pin will bypass the reference to lower the output voltage noise2). If not used this pin must be left unconnected. 5 (DSO-8 EP) 7 (TSON-10) EN Enable. With the EN pin the IFX1763 can be put into a low power shutdown state. The output will be off when the EN is pulled low. The EN pin can be driven by 5V logic or open-collector logic with pull-up resistor. The pull-up resistor is required to supply the pull-up current of the open-collector gate3) and the EN pin current4). Please note that if the EN pin is not used it must be connected to V IN. It must not be left floating. 6 (DSO-8 EP) 6,(TSON-10) GND Ground. For the ADJ version connect the bottom of the output voltage setting resistor divider directly to the GND pin for optimum load regulation performance. 8 (DSO-8 EP) 9, 10 (TSON-10) IN Input. Via the input pin IN the power is supplied to the device. A capacitor at the input pin is required if the device is more than 6 inches away from the main input filter capacitor or if bigger inductance is present at the IN pin5). The IFX1763 is designed to withstand reverse voltages on the Input pin with respect to GND and Output. In the case of reverse input (e.g. due to a wrongly attached battery) the device will act as if there is a diode in series with its input. In this way there will be no reverse current flowing into the regulator and no reverse voltage will appear at the load. Hence, the device will protect both - the device itself and the load. 9 (DSO-8 EP) 11 (TSON-10) Tab Exposed Pad. To ensure proper thermal performance,solder Pin 11 (exposed pad) of TSON-10 to the PCB ground and tie directly to Pin 6. In the case of DSO- 8 EP as well solder exposed pad (Pin 9) to the PCB ground and tie directly to Pin 6. |
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Similar Description - IFX1763 |
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