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HSP50016JC-52 Datasheet(PDF) 4 Page - Intersil Corporation |
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HSP50016JC-52 Datasheet(HTML) 4 Page - Intersil Corporation |
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4 / 30 page  3-4 Phase Generator Block Diagram Functional Description The primary function of the DDC is to extract a narrow frequency band of interest from a wideband input, convert that band to baseband and output it in either a quadrature or real form. This narrow band extraction is accomplished by down converting and centering the band of interest at DC. The conversion is done by multiplying the input data with a quadrature sinusoid. A quadrature lowpass filter is applied to the multiplier outputs. Identical real lowpass filters are provided in the in-phase (I) and quadrature phase (Q) processing branches. Each filtering chain consists of a cascaded HDF and FIR filter, which extracts the band of interest. During filtering, the signal is decimated by a rate which is proportional to the output bandwidth. The bandwidth of the resulting signal is the double sided passband width of the lowpass filters. An Output Formatter manipulates the filter output to provide the data in a variety of serial data formats. †MAXIMUM PHASE INCREMENT †DELTA PHASE INCREMENT †MINIMUM PHASE INCREMENT 33 32 18 32 32 †MODE CONTROL PHASE WORD 18 MUX SELECT 0 MUX SELECT 1 CONTROL PHASE INCREMENT 33 - INITIALIZE PHASE INCR. INITIALIZE PHASE INCR. TO MIN TO MAX PHASE ADDER CARRY OUT REGISTER (TO THE SIN/COS GENERATOR) FIGURE 2. PHASE GENERATOR BLOCK DIAGRAM † Indicates parameters set in Control Registers. †PHASE OFFSET > ≤ R E G > R E G > R E G > R E G > + PHASE ACCUMULATOR PHASE REGISTER R E G > R E G > ADDER / SUBTRACTOR MUX SELECT 0 MUX SELECT 1 PHASE INCREMENT ACCUMULATOR + HSP50016 |
Similar Part No. - HSP50016JC-52 |
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Similar Description - HSP50016JC-52 |
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