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W956K6HB Datasheet(PDF) 3 Page - Winbond |
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W956K6HB Datasheet(HTML) 3 Page - Winbond |
3 / 56 page W956K6HB Publication Release Date: Nov. 07, 2014 Revision: A01-001 - 3 - 1. GENERAL DESCRIPTION Winbond x16 ADMUX products are high-speed, CMOS pseudo-static random access memory developed for low- power, portable applications. The device has a DRAM core organized. These devices are a variation of the industry- standard Flash control interface, with a multiplexed address/data bus. The multiplexed address and data functionality dramatically reduce the required signal count, and increase READ/WRITE bandwidth. For seamless operation on a burst Flash bus, Winbond x16 ADMUX products incorporate a transparent self-refresh mechanism. The hidden refresh requires no additional support from the system memory controller and has no significant impact on device READ/WRITE performance. Two user-accessible control registers define device operation. The bus configuration register (BCR) defines how the Winbond x16 ADMUX device interacts with the system memory bus and is nearly identical to its counterpart on burst mode Flash devices. The refresh configuration register (RCR) is used to control how refresh is performed on the DRAM array. These registers are automatically loaded with default settings during power-up and can be updated anytime during normal operation. Special attention has been focused on standby current consumption during self refresh. Winbond x16 ADMUX products include two mechanisms to minimize standby current. Partial-array refresh (PAR) enables the system to limit refresh to only that part of the DRAM array that contains essential data. Temperature-compensated refresh (TCR) uses an on-chip sensor to adjust the refresh rate to match the device temperature —the refresh rate decreases at lower temperatures to minimize current consumption during standby. The system-configurable refresh mechanisms are accessed through the RCR. Winbond x16 ADMUX is compliant with the industry-standard CellularRAM 1.5 x16 A/D MUX. 2. FEATURES • Supports asynchronous, page, and burst operations • VCC, VCCQ Voltages: 1.7V –1.95V VCC 1.7V –1.95V VCCQ • Random access time: 70ns • Burst mode READ and WRITE access: 4, 8, 16, or 32 words, or continuous burst Burst wrap or sequential Max clock rate: 133 MHz (tCLK = 7.5ns) • Low power consumption: Asynchronous READ: <25 mA Continuous burst READ: <35 mA Standby current: 200 μA • Low-power features On-chip temperature compensated refresh (TCR) Partial array refresh (PAR) Deep power-down (DPD) mode • Package: 54 Ball VFBGA (6mm x8mm) •16-bit multiplexed address/data bus •Operating temperature range: -40 °C ≤ TCASE ≤ 85°C 3. ORDERING INFORMATION Part Number VDD/VDDQ I/O Width Type Others W956K6HBCX7I 1.8/1.8 x16 54VFBGA CRAM A/D Mux,133MHz, -40°C~85°C |
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