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TEA1832LTS Datasheet(PDF) 8 Page - NXP Semiconductors |
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TEA1832LTS Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 23 page TEA1832LTS All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. Product data sheet Rev. 1 — 15 December 2014 8 of 23 NXP Semiconductors TEA1832LTS GreenChip SMPS control IC 7.5 Duty cycle control (pin CTRL) Pin CTRL regulates the output power of the converter. This pin is connected to an internal voltage source of 5.4 V via an internal resistor (typical resistance: 26 k ). The CTRL pin voltage sets the peak current which is measured using the ISENSE pin (see Section 7.8). At low output power, the switching frequency is reduced (see Section 7.12). The maximum duty cycle is limited to 90 % (typical). After eight consecutive converter strokes at maximum duty cycle, the restart protection is activated. In a restart, the VCC capacitor is quickly discharged to the Vth(UVLO) level and recharged to the start-up level from the high-voltage mains, before switching recommences. 7.6 Slope compensation (pin CTRL) A slope compensation circuit is integrated for CCM. The slope compensation guarantees stable operation for duty cycles exceeding 50 %. 7.7 Overpower timer A temporary overload situation is allowed. If Vsense (see Figure 1) set by pin CTRL exceeds 400 mV, an internal timer is started. If the overload situation continues to exist for more than 160 ms (typical), an OverPower Protection (OPP) is triggered (see Figure 7). The TEA1832LTS activates the latched protection and enters power-down mode. To prevent a restart when during a short circuit of the output VCC drops to below Vth(UVLO) earlier than the OPP time-out is reached, this protection is also latched (see Section 7.2). 7.8 Current mode control (pin ISENSE) Current mode control is used because it ensures a good line regulation. Pin ISENSE senses the primary current across external resistor R6 and compares it with an internal control voltage. The internal control voltage is proportional to the CTRL pin voltage (see Figure 8). Fig 7. Overpower delay |
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