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TPS40428RHAT Datasheet(PDF) 3 Page - Texas Instruments |
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TPS40428RHAT Datasheet(HTML) 3 Page - Texas Instruments |
3 / 92 page 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 30 29 28 27 26 25 24 23 22 21 40 39 38 37 36 35 34 33 32 31 SYNC PHSET CNTL1 CNTL2 SMBALERT PMBDATA PMBCLK AGND AVSDATA AVSCLK TPS40428 ISH1 PG1 PWM1 PGND BP3 BP5 VDD PWM2 PG2 ISH2 Thermal Pad TPS40428 www.ti.com SLUSBV0A – MAY 2014 – REVISED JULY 2014 5 Pin Configuration and Functions RHA PACKAGE 40 PINS (TOP VIEW) Pin Functions PIN I/O DESCRIPTION NAME NO. ADDR1 11 I High order address pin for PMBus device. Connect a resistor to AGND (see Table 3). ADDR0 12 I Low order address pin for PMBus device. Connect a resistor to AGND (see Table 3). AGND 8 — Analog ground pin, used for analog signal. Connect to thermal pad directly. AVSCLK 10 I AVS clock AVSDATA 9 I AVS data 3.3-V bias power for logic. A low-ESR ceramic capacitor with a value of 0.33 µF or greater should be BP3 26 O connected closely from this pin or to AGND. The maximum suggested capacitor value is 10 µF. Output bypass for the internal regulator. A low-ESR ceramic capacitor of 1 µF or greater should be BP5 25 O connected closely from this pin to PGND pin. The maximum suggested capacitor value is 10 µF. Logic level input which starts or stops channel 1. An internal 6-µA current source pulls VCNTL1 up to VBP5 CNTL1 3 I when the pin is floating. Logic level input which starts or stops channel 2. An internal 6-µA current source pulls VCNTL2 up to VBP5 CNTL2 4 I when the pin is floating. COMP1 36 O Output of the error amplifier 1 and connection node for loop feedback components COMP2 15 O Output of the error amplifier 2 and connection node for loop feedback components Negative pin of current sense amplifier for channel 1. An internal, 4-k Ω resistor pulls CS1N to 1.24 V during CS1N 33 I smart power mode operation to provide a bias voltage required by smart power stage. CS1P 32 I Positive pin of current sense amplifier for channel 1 Negative pin of current sense amplifier for channel 2. An internal, 4-k Ω resistor pulls CS2N to 1.24 V during CS2N 18 I smart power mode operation to provide a bias voltage required by smart power stage. CS2P 19 I Positive pin of current sense amplifier for channel 2 DIFFO1 39 O Remote Sense Amplifier Output for channel 1 Inverting input to the error amplifier 1. In normal operation, the voltage on this pin is equal to the internal FB1 35 I reference voltage. Connect the FB1 pin to the BP5 pin to set the channel as slave channel. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS40428 |
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