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TPS53114 Datasheet(PDF) 11 Page - Texas Instruments |
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TPS53114 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 30 page TRIP TRIP TRIP V (mV) R (k ) I ( A) = ( ) IN O O TRIP OCL DS(ON) sw IN V V V V = I R 2 L1 V æ ö - - · · ç ÷ ç ÷ · · ¦ è ø TPS53114 www.ti.com SLVS887C – APRIL 2009 – REVISED AUGUST 2014 Feature Description (continued) 8.3.9 Over Current Protection TPS53114 has a cycle-by-cycle over current limit feature. The over current limits the inductor valley current by monitoring the voltage drop across the low-side MOSFET RDS(on) during the low-side driver on-time. If the inductor current is larger than the over current limit (OCL), the TPS53114 delays the start of the next switching cycle until the sensed inductor current falls below the OCL current. MOSFET RDS(on) current sensing is used to provide an accuracy and cost effective solution without external devices. To program the OCL, the TRIP pin should be connected to GND through a trip voltage setting resistor, according to Equation 1 and Equation 2. (1) (2) The trip voltage should be between 30 mV to 200 mV over all operational temperature, including the 4000 ppm/°C temperature slope compensation for the temperature dependency of the RDS(on). If the load current exceeds the over current limit, the voltage will begin to drop. If the over current conditions continues, the output voltage will fall below the under voltage protection threshold and the TPS53114 will shut down. 8.3.10 Over/under Voltage Protection TPS53114 monitors a resistor divided feedback voltage to detect over and under voltage. If the feedback voltage is higher than 115% of the reference voltage, the OVP comparator output goes high and the circuit latches the high-side MOSFET driver OFF and the low-side MOSFET driver ON. When the feedback voltage is lower than 70% of the reference voltage, the UVP comparator output goes high and an internal UVP delay counter begins counting. After 30 μs, TPS53114 latches OFF both top and bottom MOSFET drivers. This function is enabled approximately 1.7x TSS after power-on. The OVP and UVP latch off is reset when EN goes low level. 8.3.11 UVLO Protection TPS53114 has V5FILT under voltage lock out protection (UVLO) that monitors the voltage of V5FILT pin. When the V5FILT voltage is lower than UVLO threshold voltage, the device is shut off. All output drivers are OFF and output discharge is ON. The UVLO is non-latch protection. 8.3.12 Thermal Shutdown The TPS53114 includes an over temperature protection shut-down feature. If the TPS53114 die temperature exceeds the OTP threshold (typically 150°C), both the high-side and low-side drivers are shut off, the output voltage discharge function is enabled and then the device is shut off until the die temperature drops. Thermal shutdown is a non-latch protection. 8.4 Device Functional Modes 8.4.1 Operation The TPS53114 has two operating modes. The TPS53114 is in shut down mode when the EN pin is low. When the EN pin is pulled high, the TPS53114 enters the normal operating mode. Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TPS53114 |
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