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TPS53126 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS53126 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 33 page  TRIP1 VIN VO1 VFB1 GND TEST1 VREG5 V5FILT TEST2 TRIP2 VFB2 VO2 15 14 13 1 2 3 4 5 18 17 16 6 1 2 3 4 5 6 7 11 8 12 9 10 24 23 22 21 20 19 18 14 17 13 16 15 VBST1 EN1 VO1 VFB1 GND TEST1 VFB2 VO2 EN2 VBST2 DRVH1 SW1 DRVL1 PGND1 TRIP1 VIN VREG5 V5FILT TEST2 TRIP2 PGND2 DRVL2 SW2 DRVH2 TPS53126 www.ti.com SLUS909B – MAY 2009 – REVISED AUGUST 2014 6 Pin Configurations and Functions 24 Pin VQFN 24 Pin TSSOP RGE Package PW Package (Top View) (Top View) Pin Functions PIN I/O DESCRIPTION VQFN 24 TSSOP 24 NAME NUMBER NUMBER Supply input for high-side NFET driver (Boost Terminal). Bypass to SWx with a high- VBST1, 23, 8 2, 11 I quality 0.1 μF ceramic capacitor. An external schottky diode can be added if forward drop VBST2 is critical to drive the high-side FET. EN1, EN2 24, 7 3, 10 I Channel 1 and channel 2 high level enable pins. Output voltage inputs for on-time adjustment and output discharge. Connect directly to the VO1, VO2 1, 6 4, 9 I output voltage. VFB1, 2, 5 5, 8 I D-CAP2 feedback inputs. Connect to output voltage with resistor divider. VFB2 GND 3 6 I Signal ground pin. Connect to PGND1, PGND2 and system ground at a single point. DRVH1, High-side MOSFET gate driver outputs. SWx referenced drivers switch between SWx 22, 9 1, 12 O DRVH2 (OFF) and VBSTx (ON). SW1, SW2 21, 10 24, 13 I/O Switch node connections for both the high-side drivers and the current comparators. DRVL1, Low-side MOSFET gate driver outputs. PGND referenced drivers switch between PGNDx 20, 11 23, 14 O DRVL2 (OFF) and VREG5 (ON). PGND1, Power ground connections for both the low-side drivers and the current comparators. 19, 12 22, 15 I/O PGND2 Connect PGND1, PGND2 and GND strongly together near the IC. TRIP1, Over current trip point programming pin. Connect to GND with a resistor to GND to set 18, 13 21, 16 I TRIP2 threshold for low-side RDS(on) current limit. VIN 17 20 I Supply Input for 5V linear regulator. 5V supply input for the entire control circuit except the MOSFET drivers. Bypass to GND V5FILT 15 18 I with a minimum 1.0 μF, high-quality ceramic capacitor. V5FILT is connected to VREG5 via an internal 10 Ω resistor. Output of 5V linear regulator and supply for MOSFET drivers. Bypass to GND with a VREG5 16 19 O minimum 4.7 μF high-quality ceramic capacitor. VREG5 is connected to V5FILT via an internal 10 Ω resistor. TEST1 4 7 O Test interface pin, not used during application. Connect directly to GND. Frequency select pin. Connect to GND for 350kHz switching. Connect to V5FILT for TEST2 14 17 I 700kHz switching. Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS53126 |
Similar Part No. - TPS53126_15 |
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Similar Description - TPS53126_15 |
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