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NJU6679CL Datasheet(PDF) 8 Page - New Japan Radio |
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NJU6679CL Datasheet(HTML) 8 Page - New Japan Radio |
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8 / 46 page  NJU6679 NJU6679 No. Symbol I/O F u n c t i o n 1,40 VDD Power VDD=+3V 5,22 VSS GND VSS=0V 39 38 37 36 35 V1 V2 V3 V4 V5 Power LCD Driving Voltage Supplying Terminal. When the internal voltage booster is not used, supply each level of LCD driving voltage from outside with following relation. VDD>V1>V2>V3>V4>V5 When the internal power supply is on, the internal circuits generate and supply following LCD bias voltage from V1 to V4 terminals. (VLCD=VDD-V5) 33,32, 31,30, 29,28, 27,26, 25,24 C1+,C1- C2+,C2- C3+,C3- C4+,C4- C5+,C5- O Step up capacitor connecting terminals. Voltage booster circuit (Maximum 6-time) 23 VOUT O Step up voltage output terminal. Connect the step up capacitor between this terminal and VSS. 34 VR I Voltage adjust terminal. V5 level is adjusted by external bleeder resistance connecting between VDD and V5 terminal. 7 6 T1 T2 I LCD bias voltage control terminals. ( *:Don't Care) 14 to 21 D0 to D7 (SI) (SCL) I/O P/S="H" : Tri-state bi-directional Data I/O terminal in 8-bit parallel operation. P/S="L" : D7=Serial data input terminal. D 6=Serial data clock signal input terminal. Data from SI is loaded at the rising edge of SCL and latched as the parallel data at 8th rising edge of SCL. 11 A0 I Connect to the Address bus of MPU. The data on the D 0 to D7 is distinguished between Display data and Instruction by status of A0. 4 RES I Reset terminal. When the RES terminal goes to "L", the initialization is performed. Reset operation is executing during "L" state of RES. 10 CS I Chip select terminal. Data Input/Output are available during CS ="L". TERMINAL DESCRIPTION TERMINAL DESCRIPTION Bias V1 V2 V3 V4 1/4Bias V5+3/4VLCD V5+2/4VLCD V5+2/4VLCD V5+1/4VLCD 1/5Bias V5+4/5VLCD V5+3/5VLCD V5+2/5VLCD V5+1/5VLCD 1/6Bias V5+5/6VLCD V5+4/6VLCD V5+2/6VLCD V5+1/6VLCD 1/7Bias V5+6/7VLCD V5+5/7VLCD V5+2/7VLCD V5+1/7VLCD 1/8Bias V5+7/8VLCD V5+6/8VLCD V5+2/8VLCD V5+1/8VLCD 1/9Bias V5+8/9VLCD V5+7/9VLCD V5+2/9VLCD V5+1/9VLCD 1/10Bias V5+9/10VLCD V5+8/10VLCD V5+2/10VLCD V5+1/10VLCD 1/11Bias V5+10/11VLCD V5+9/11VLCD V5+2/11VLCD V5+1/11VLCD 1/12Bias V5+11/12VLCD V5+10/12VLCD V5+2/12VLCD V5+1/12VLCD T 1 T 2 Vo lt age boos t e r C ir. Vo lt age Ad j. V / F C ir. L * Ava il ab le Ava il ab le Ava il ab le H L No t Ava il. Ava il ab le Ava il ab le H H No t Ava il. No t Ava il. Ava il ab le A0 H L Distin. Display Data Instruction |
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