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ML4790ES Datasheet(PDF) 5 Page - Micro Linear Corporation |
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ML4790ES Datasheet(HTML) 5 Page - Micro Linear Corporation |
5 / 10 page 5 ML4790 SHUTDOWN The SHDN pin should be held low for normal operation. Raising the voltage on SHDN above the threshold level will release the gate of Q3, which effectively becomes an open circuit. This also prevents the one shot from triggering, which keeps switching from occurring. DESIGN CONSIDERATIONS INDUCTOR Selecting the proper inductor for a specific application usually involves a trade-off between efficiency and maximum output current. Choosing too high a value will keep the regulator from delivering the required output current under worst case conditions. Choosing too low a value causes efficiency to suffer. It is necessary to know the maximum required output current and the input voltage range to select the proper inductor value. The maximum inductor value can be estimated using the following formula: L VT VV I MAX IN MIN ON MIN OUT OS OUT MAX = ×× ×+ × () () () () 2 2 η (1) where η is the efficiency, typically between 0.75 and 0.85, and VOS is the dropout voltage at IOUT(MAX) taken from Figure 3. Note that this is the value of inductance that just barely delivers the required output current under worst case conditions. A lower value may be required to cover inductor tolerance, the effect of lower peak inductor currents caused by resistive losses, and minimum dead time between pulses. Another method of determining the appropriate inductor value is to make an estimate based on the typical performance curves given in Figures 6 and 7. Figure 6 shows maximum output current as a function of input voltage for several inductor values. These are typical performance curves and leave no margin for inductance and ON-time variations. To accommodate worst case conditions, it is necessary to derate these curves by at least 10% in addition to inductor tolerance. For example, a two cell to 5.5V application requires 40mA of output current while using an inductor with 15% tolerance. The output current should be derated by 25% to 50mA to cover the combined inductor and ON-time tolerances. Assuming that 2V is the end of life voltage of a two cell input, Figure 6 shows that with a 2V input, the ML4790 delivers 52mA with a 22 µH inductor. Note, that at lower output voltages there is less voltage required at the PFM stage, and therefore less gate drive available for the pass device Q3. This results in Q3 being more resistive and unable to deliver as much output current as a ML4790 set for a higher output voltage. This characteristic is shown in Figure 4. 200 180 160 140 120 100 80 60 40 20 0 2.5V 3.5V 4.5V 5.5V VOUT (V) Figure 4. ML4790 IOUT MAX VIN = VOUT – 0.5V, L = 22µH PFM REGULATOR OPERATION When the output of the PFM stage, VBOOST (pin 5), is at or above the dropout voltage, VOUT + VOS, the output of A1 stays low and the circuit remains idle. When VBOOST falls below the required dropout voltage, the output of A1 goes high, signaling the regulator to deliver charge to the capacitor C2. Since the output of A2 is normally high, the output of the flip-flop becomes SET. This triggers the one shot to turn Q1 on and begins charging L1 for 5 µs. When the one shot times out, Q1 turns off, allowing L1 to flyback and momentarily charge C2 through the body diode of Q2. But, as the source voltage of Q2 rises above the drain, the current sensing amplifier A2 drives the gate of Q2 low, causing Q2 to short out the body diode. The inductor then discharges into C2 through Q2. The output of A2 going low also serves to RESET the flip-flop in preparation for the next charging cycle. When the inductor current in Q2 falls to zero, the output of A2 goes high, releasing Q2‘s gate, allowing the flip-flop to be SET again. If the voltage at VBOOST is still low, A1 will initiate another pulse. Typical inductor current and voltage waveforms are shown in Figure 5. Q(ONE SHOT) Q1 ON Q1 ON Q2 ON Q2 ON INDUCTOR CURRENT Q1 & Q2 OFF Figure 5. PFM Inductor Current Waveforms and Timing. |
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