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ML4827IP-1 Datasheet(PDF) 9 Page - Micro Linear Corporation

Part # ML4827IP-1
Description  Fault-Protected PFC and PWM Controller Combo
Download  16 Pages
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Manufacturer  MICRO-LINEAR [Micro Linear Corporation]
Direct Link  http://www.microlinear.com
Logo MICRO-LINEAR - Micro Linear Corporation

ML4827IP-1 Datasheet(HTML) 9 Page - Micro Linear Corporation

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ML4827
9
FUNCTIONAL DESCRIPTION (Continued)
Error Amplifier Compensation
The PWM loading of the PFC can be modeled as a
negative resistor; an increase in input voltage to the PWM
causes a decrease in the input current. This response
dictates the proper compensation of the two
transconductance error amplifiers. Figure 2 shows the
types of compensation networks most commonly used for
the voltage and current error amplifiers, along with their
respective return points. The current loop compensation is
returned to VREF to produce a soft-start characteristic on
the PFC: as the reference voltage comes up from zero
volts, it creates a differentiated voltage on IEAO which
prevents the PFC from immediately demanding a full duty
cycle on its boost converter.
There are two major concerns when compensating the
voltage loop error amplifier; stability and transient
response. Optimizing interaction between transient
response and stability requires that the error amplifier’s
open-loop crossover frequency should be 1/2 that of the
line frequency, or 23Hz for a 47Hz line (lowest
anticipated international power frequency). The gain vs.
input voltage of the ML4827’s voltage error amplifier has
a specially shaped nonlinearity such that under steady-
state operating conditions the transconductance of the
error amplifier is at a local minimum. Rapid perturbations
in line or load conditions will cause the input to the
voltage error amplifier (VFB) to deviate from its 2.5V
(nominal) value. If this happens, the transconductance of
the voltage error amplifier will increase significantly, as
shown in the Typical Performance Characteristics. This
raises the gain-bandwidth product of the voltage loop,
resulting in a much more rapid voltage loop response to
such perturbations than would occur with a conventional
linear gain characteristic.
The current amplifier compensation is similar to that of
the voltage error amplifier with the exception of the
choice of crossover frequency. The crossover frequency of
the current amplifier should be at least 10 times that of
the voltage amplifier, to prevent interaction with the
voltage loop. It should also be limited to less than 1/6th
that of the switching frequency, e.g. 16.7kHz for a
100kHz switching frequency.
There is a modest degree of gain contouring applied to the
transfer characteristic of the current error amplifier, to
increase its speed of response to current-loop
perturbations. However, the boost inductor will usually be
the dominant factor in overall current loop response.
Therefore, this contouring is significantly less marked than
that of the voltage error amplifier.
For more information on compensating the current and
voltage control loops, see Application Notes 33 and 34.
Application Note 16 also contains valuable information
for the design of this class of PFC.
Oscillator (RAMP 1)
The oscillator frequency is determined by the values of RT
and CT, which determine the ramp and off-time of the
oscillator output clock:
f
tt
OSC
RAMP
DEADTIME
=
+
1
(2)
The deadtime of the oscillator is derived from the
following equation:
tC
R
In
V
V
RAMP
T
T
REF
REF
´
-
-
F
HG
I
KJ
125
375
.
.
(3)
at VREF = 7.5V:
tC
R
RAMP
T
T
´ 051
.
The deadtime of the oscillator may be determined using:
t
V
mA
CC
DEADTIME
T
T
=
´
25
51
490
.
.
(4)
The deadtime is so small (tRAMP >> tDEADTIME) that the
operating frequency can typically be approximated by:
f
t
OSC
RAMP
=
1
(5)
EXAMPLE:
For the application circuit shown in the data sheet, with
the oscillator running at:
fkHz
t
OSC
RAMP
==
100
1
tC
R
RAMP
T
T
´
= ´
-
0 51110
5
.
Solving for RT x CT yields 2 x 10-4. Selecting standard
components values, CT = 470pF, and RT = 41.2kΩ.
The deadtime of the oscillator adds to the Maximum
PWM Duty Cycle (it is an input to the Duty Cycle
Limiter). With zero oscillator deadtime, the Maximum
PWM Duty Cycle is typically 45% for the ML4827-1. In
many applications of the ML4827-1, care should be taken
that CT not be made so large as to extend the Maximum
Duty Cycle beyond 50%. This can be accomplished by
using a stable 470pF capacitor for CT.


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