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ML6622

Micro Linear

FUNCTIONAL DESCRIPTION

The ML6622 high speed data quantizer accepts a low

level analog signal from a pin diode and transimpedance

amp front end and converts it into digital ECL levels for

subsequent digital processing. The input signal, from a

transimpedance amplifier, is immediately amplified by a

two-stage video amplifier. The output of this amplifier

feeds two parallel paths.

The data path is comprised of a high speed comparator

that outputs PECL differential data on the ECL OUT

± pins.

The Link Detection path monitors the magnitude of the

amplified input signal, compares it to a user-settable

threshold, and provides the result of the comparison as a

PECL differential output on the Link

± pins. The timer

following the threshold block is used to set the Link

Detect output acquire and deacquire time using a

capacitor.

AMPLIFIER

The amplifier is a two stage video amplifier with a gain of

approximately 55V/V. Maximum sensitivity is achieved

through the use of the DC restoration feedback loop and

AC coupling the input. The AC coupling input capacitors,

in conjunction with the input impedance of the amplifier,

establish a high pass filter with the lower 3dB point

determined by the input resistance and the input coupling

capacitors. This cap also adds a secondary pole to the

offset loop.

Since the amplifier has a differential input, two AC

capacitors of equal value are required. If the signal driving

the input is single ended, the other coupling capacitor

A low-pass filter in the offset loop is created with the

capacitor on pin 15 (CAP). The lower 3dB point

shown in the application circuit. For stability reasons the

value of the capacitor on the CAP pin should be 10 times

larger than the input coupling capacitors. The 3dB point is

given by the following equation:

F

C

3

1

2

100

dB

k

=

××

π

Although the input is AC coupled, the offset voltage

within the amplifier will be present at the amplifier’s

output. The removal of the dc offset in the amplifier helps

the circuit respond to small input voltages, and reduces

duty-cycle distortion. In order to reduce this error, a

negative feedback loop nulls the offset voltage. An

external capacitor connected to the CAP pin is used to

and a difference current proportional to the result is

applied to the negative side of the input stage of the AMP

circuit block thereby nulling the DC offset.

COMPARATOR

A high speed ECL comparator with PECL outputs is used

for the quantization function. The comparator has an

Enable input pin which takes an ECL level. This Enable

pin is normally driven by LINKLED, which causes the

output to be enabled when the link is up and disabled

when the link is down. When ENABLE is low the

comparator is operational. When ENABLE is high the

comparator is disabled causing ECL OUT– to go low and

ECL OUT+ to go high. The ENABLE pin can be tied to

ground to keep the comparator permanently enabled.

LINK DETECT CIRCUIT

The Link Detection Circuit is used to accurately measure

the input amplitude to determine whether it is large

enough to reliably recover the input signal. Once the Bit

Error Rate (BER) for the ML6622 receive circuit is

determined, the link detect threshold can be set so that the

Link Detect Circuit will shut off before the error rate

exceeds the link requirement.

The Link Detection Circuit consists of three functional

blocks; Thresh, Timer, and Link Out. Thresh detects the

output of Amp and compares it to a programmable

threshold input THIN. As long as the input amptitude is

greater than the programmable threshold input, the Link

Detect output remains active.

When the peak input drops below THIN, Thresh’s output

changes state and Timer delays the Link Out state change

for a programmable amount of time. When using the

and the assert time values conform to the ANSI X3.166-

1990 PMD standard for FDDI.

To improve stability, the Link Detect circuit includes 1.7dB

of hysteresis.

be divided down before applied to THIN. The formula for

the threshold on the thin pin is as follows:

Threshold Assert

()

=

500

Threshold Deassert

()

=

750