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MT28F004B3VG-8B Datasheet(PDF) 1 Page - Micron Technology |
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MT28F004B3VG-8B Datasheet(HTML) 1 Page - Micron Technology |
1 / 30 page 1 4Mb Smart 3 Boot Block Flash Memory F45_3.p65 – Rev. 3, Pub. 12/01 ©2001, Micron Technology, Inc. 4Mb SMART 3 BOOT BLOCK FLASH MEMORY PRODUCTS AND SPECIFICATIONS DISCUSSED HEREIN ARE SUBJECT TO CHANGE BY MICRON WITHOUT NOTICE. GENERAL DESCRIPTION The MT28F004B3 (x8) and MT28F400B3 (x16/x8) are nonvolatile, electrically block-erasable (flash), pro- grammable memory devices containing 4,194,304 bits organized as 262,144 words (16 bits) or 524,288 bytes (8 bits). Writing or erasing the device is done with either a 3.3V or 5V VPP voltage, while all operations are performed with a 3.3V VCC. Due to process technology advances, 5V VPP is optimal for application and production pro- gramming. These devices are fabricated with Micron’s advanced 0.18µm CMOS floating-gate process. The MT28F004B3 and MT28F400B3 are organized into seven separately erasable blocks. To ensure that critical firmware is protected from accidental erasure or overwrite, the devices feature a hardware-protected boot block. Writing or erasing the boot block requires either applying a super-voltage to the RP# pin or driv- ing WP# HIGH in addition to executing the normal write or erase sequences. This block may be used to store code implemented in low-level system recovery. The remaining blocks vary in density and are written and erased with no additional security measures. Refer to Micron’s Web site (www.micron.com/flash) for the latest data sheet. FLASH MEMORY MT28F004B3 MT28F400B3 3V Only, Dual Supply (Smart 3) FEATURES • Seven erase blocks: 16KB/8K-word boot block (protected) Two 8KB/4K-word parameter blocks Four main memory blocks • Smart 3 technology (B3): 3.3V ±0.3V VCC 3.3V ±0.3V VPP application programming 5V ±10% VPP application/production programming1 • Compatible with 0.3µm Smart 3 device • Advanced 0.18µm CMOS floating-gate process • Address access time: 80ns • 100,000 ERASE cycles • Industry-standard pinouts • Inputs and outputs are fully TTL-compatible • Automated write and erase algorithm • Two-cycle WRITE/ERASE sequence • Byte- or word-wide READ and WRITE (MT28F400B3, 256K x 16/512K x 8) • Byte-wide READ and WRITE only (MT28F004B3, 512K x 8) • TSOP and SOP packaging options OPTIONS MARKING • Timing 80ns access -8 • Configurations 512K x 8 MT28F004B3 256K x 16/512K x 8 MT28F400B3 • Boot Block Starting Word Address Top (3FFFFh) T Bottom (00000h) B • Operating Temperature Range Commercial (0ºC to +70ºC) None Extended (-40ºC to +85ºC) ET • Packages 44-pin SOP (MT28F400B3) SG 48-pin TSOP Type I (MT28F400B3) WG 40-pin TSOP Type I (MT28F004B3) VG NOTE: 1. This generation of devices does not support 12V VPP compatibility production programming; however, 5V VPP application production programming can be used with no loss of performance. Part Number Example: MT28F400B3SG-8 T 40-Pin TSOP Type I 48-Pin TSOP Type I 44-Pin SOP |
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