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MT4LC8M8C2DJ-5 Datasheet(PDF) 10 Page - Micron Technology |
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MT4LC8M8C2DJ-5 Datasheet(HTML) 10 Page - Micron Technology |
10 / 22 page 10 8 Meg x 8 EDO DRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. D20_2.p65 – Rev. 5/00 ©2000, Micron Technology, Inc. 8 MEG x 8 EDO DRAM READ CYCLE tRRH tCLZ tCAC tRAC tAA VALID DATA OPEN tOFF tRCH ROW tRCS tASC tRAH tRAD tAR tCAH tRCD tCAS tRSH tCSH tRP tRC tRAS tCRP tASR ROW OPEN RAS# V V IH IL V V IH IL ADDR V V IH IL DQ V V OH OL V V IH IL tOD tOE OE# V V IH IL COLUMN CAS# WE# NOTE 1 tACH DON’T CARE UNDEFINED NOTE: 1. tOFF is referenced from rising edge of RAS# or CAS#, whichever occurs last. -5 -6 SYMBOL MIN MAX MIN MAX UNITS tOFF 0 12 0 15 ns tRAC 50 60 ns tRAD 9 12 ns tRAH 9 10 ns tRAS 50 10,000 60 10,000 ns tRC 84 104 ns tRCD 11 14 ns tRCH 0 0 ns tRCS 0 0 ns tRP 30 40 ns tRRH 0 0 ns tRSH 13 15 ns TIMING PARAMETERS -5 -6 SYMBOL MIN MAX MIN MAX UNITS tAA 25 30 ns tACH 12 15 ns tAR 38 45 ns tASC 0 0 ns tASR 0 0 ns tCAC 13 15 ns tCAH 8 10 ns tCAS 8 10,000 10 10,000 ns tCLZ 0 0 ns tCRP 5 5 ns tCSH 38 45 ns tOD 0 12 0 15 ns tOE 12 15 ns |
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