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MT4LC16M4A7TG-6 Datasheet(PDF) 11 Page - Micron Technology |
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MT4LC16M4A7TG-6 Datasheet(HTML) 11 Page - Micron Technology |
11 / 20 page 11 16 Meg x 4 FPM DRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. D21_2.p65 – Rev. 5/00 ©2000, Micron Technology, Inc. 16 MEG x 4 FPM DRAM READ-WRITE CYCLE (LATE WRITE and READ-MODIFY-WRITE cycles) VALID D OUT VALID D IN ROW COLUMN ROW V V IH IL CAS# V V IH IL ADDR V V IH IL V V IH IL DQ V V IOH IOL V V IH IL RAS# OPEN OPEN tOE tOD tCAC tRAC tAA tCLZ tDS tDH tAWD tWP tRWL tCWL tCWD tRWD tRCS tASC tCAH tAR tASR tRAD tCRP tRCD tCAS tRSH tCSH tRAS tRWC tRP tRAH OE# tOEH WE# DON’T CARE UNDEFINED -5 -6 SYMBOL MIN MAX MIN MAX UNITS tOD 3 13 3 15 ns tOE 13 15 ns tOEH 13 15 ns tRAC 50 60 ns tRAD 13 15 ns tRAH 8 10 ns tRAS 50 10,000 60 10,000 ns tRCD 18 20 ns tRCS 0 0 ns tRP 30 40 ns tRSH 13 15 ns tRWC 131 155 ns tRWD 73 85 ns tRWL 13 15 ns tWP 8 10 ns TIMING PARAMETERS -5 -6 SYMBOL MIN MAX MIN MAX UNITS tAA 25 30 ns tAR 40 45 ns tASC 0 0 ns tASR 0 0 ns tAWD 48 55 ns tCAC 13 15 ns tCAH 8 10 ns tCAS 13 10,000 15 10,000 ns tCLZ 3 3 ns tCRP 5 5 ns tCSH 50 60 ns tCWD 36 40 ns tCWL 13 15 ns tDH 8 10 ns tDS 0 0 ns |
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