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MT9M114 Datasheet(PDF) 9 Page - ON Semiconductor

Part # MT9M114
Description  Digital Image Sensor
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

MT9M114 Datasheet(HTML) 9 Page - ON Semiconductor

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MT9M114 DS Rev. J Pub. 4/15 EN
9
©Semiconductor Components Industries, LLC,2015.
MT9M114: 1/6-Inch 720p High-Definition (HD) System-On-A-Chip (SOC) Dig-
ital Image Sensor
Notes:
1. AGND and DGND are not connected internally.
2. To be left floating if not using feature. If not using the feature, then there is no need to bond out the
relevant pads.
3. Must always be connected even when not using MIPI.
4. When CONFIG = 1 the EXTCLK must be in the range 20-24 MHz.
Table 3:
Pin Descriptions
Name
Type
Description
Notes
EXTCLK
Input
Input clock signal.
RESET_BAR
Input/PU
Master reset signal, active LOW. This signal has an internal pull up.
OE_BAR
Input
Parallel interface enable pad, active LOW.
SCLK
Input
Two-wire serial interface clock.
SDATA
I/O
Two-wire serial interface data.
SADDR
Input
Selects device address for the two-wire serial interface.
FRAME_VALID (FV)
Output
Identifies rows in the active image. Data can be sampled with PIXCLK when
both LV and FV are high (except when BT656 is used).
LINE_VALID (LV)
Output
Identifies pixels in the active line. Data can be sampled with PIXCLK when
both LV and FV are high (except when BT656 is used).
PIXCLK
Output
Pixel clock.
DOUT[7:0]
Output
DOUT[7:0] for 8-bit image data output or DOUT[9:2] for 10-bit image data
output.
DOUT_LSB[1:0]
Output
LSBs when outputting 10-bit image data
CLK_N
Output
Differential MIPI clock (sub-LVDS, negative).
2
CLK_P
Output
Differential MIPI clock (sub-LVDS, positive).
2
DATA_N
Output
Differential MIPI data (sub-LVDS, negative.
2
DATA_P
Output
Differential MIPI data (sub-LVDS, positive).
2
CONFIG
Input/PU
If on power-up CONFIG = 1 then the part shall go into streaming (default
option, PU ensures this will occur). If CONFIG = 0 then the part will go to
standby state waiting for host to update.
4
FLASH
Output
Used as a flash signal
2
CHAIN
Output/PU
To synchronize a number of sensors together.
2
TRST_BAR
Input
Must be tied to GND in normal operation.
VDD
Supply
Digital Power
DGND
Supply
Digital ground.
1
VDD_IO
Supply
I/O power supply.
GND_IO
Supply
I/O ground.
VAA
Supply
Analog power.
AGND
Supply
Analog ground.
1
VDD_PLL
Supply
PLL Supply
GND_PLL
Supply
PLL GND
VDD_PHY
Supply
I/O power supply for the MIPI interface.
3


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