MT9M021-MT9M031_DS Rev. G Pub. 4/15 EN

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©Semiconductor Components Industries, LLC,2015.

MT9M021/MT9M031: 1/3-Inch CMOS Digital Image Sensor

Features Overview

Figure 2:

Typical Configuration: Serial Four-Lane HiSPi Interface

Notes:

1. All power supplies must be adequately decoupled.

2. ON Semiconductor recommends a resistor value of 1.5k, but it may be greater for slower two-wire

speed.

3. This pull-up resistor is not required if the controller drives a valid logic level on SCLK at all times.

4. The parallel interface output pads can be left unconnected if the serial output interface is used.

5. ON Semiconductor recommends that 0.1μF and 10μF decoupling capacitors for each power supply

are mounted as close as possible to the pad. Actual values and results may vary depending on lay-

out and design considerations. Refer to the MT9M021/MT9M031 demo headboard schematics for

circuit recommendations.

6. ON Semiconductor recommends that analog power planes be placed in a manner such that cou-

pling with the digital power planes is minimized.

7. Although 4 serial lanes are shown, the MT9M021/MT9M031 supports only 2 or 3 lane HiSPi.

Master clock

(6–50 MHz)

SCLK

RESET_BAR

TEST

EXTCLK

Digital

ground

Analog

ground

Digital

Core

HiSPi

Analog

To

controller

From

controller

PLL

Digital

I/O

Analog

SLVSC_N

SLVSC_P

SLVS0_P

SLVS0_N

SLVS1_P

SLVS1_N

SLVS2_P

SLVS2_N

SLVS3_P

SLVS3_N

FLASH

OE_BAR

STANDBY