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TPS65400RGZR Datasheet(PDF) 8 Page - Texas Instruments |
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TPS65400RGZR Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 76 page  TPS65400 SLVSCQ9B – NOVEMBER 2014 – REVISED SEPTEMBER 2015 www.ti.com Electrical Characteristics (continued) VIN = 12 V, Frequency = 500 kHz, TJ = –40°C to 125°C, typical values are at TJ = 25°C, unless otherwise indicated PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Quiescent non-switching, no load CE high, VFB >> VREF, (no IVIN 8 mA current switching) ISD Quiescent shutdown current CE low 12 27 µA VIN_UVLO Input voltage UVLO Rising 4.25 4.48 V VIN_UVLO Input voltage UVLO Falling 3.4 3.75 V PGOOD, ENSWx, RST_N, SSx, PG Resistance of PGOOD outputs when R_LPGOOD 500 Ω low V_OLPGOOD Logic output low voltage I_OL = 100 µA 0.1 V ISS Soft-start current 4.1 5.6 7.3 µA Enable logic high threshold (for ENSW1, VEN VEN rising 1.12 1.20 1.28 V ENSW2, ENSW3, ENSW4) Enable logic low threshold (for ENSW1, VEN_L VEN falling 0.97 1.07 V EN_L ENSW2, ENSW3, ENSW4) Enable hysteresis (for ENSW1, ENSW2, VEN_HYS VEN falling 130 mV ENSW3, ENSW4) IEN ENSWx pin pullup current VEN = 0 2 µA ICE CE pin pullup current VCE = 0 2 µA VIH_CE Logic input high for CE 1.3 V VIL_CE Logic input low CE 0.4 V VIH_RSTN Logic input high RST_N 1.3 V VIL_RSTN Logic input low RST_N 0.4 V I2C MODULE (SDA, SCL, I2CALERT, I2CADDR) V_ILI2C Logic input low SCL, SDA 0.8 V V_IHI2C Logic input high for SCL, SDA 2.1 V ON resistance of I2C pins R_LI2C I2CALERT = 1 85 Ω (SDA,SCL,I2CALERT) to GND Logic output low voltage for V_OLI2C I_OL = 350 µA 0.1 V SCL,SDA,I2CALERT pins ILEAK Input leakage current SDA, SCL = 3.3 V 1 µA II2CADDR Source current of I2CADDR pin VDDD = 3.3 V, VIN > 4.5 V 20 µA tTIMEOUT Timeout detection on SDA or SCL low 30 ms tTIMEOUT_PULSE Duration of timeout pulse on I2CALERT 200 µs FAULTS TTSD (2) Thermal shutdown threshold 160 ⁰C TTSD_restart (2) Thermal shutdown hysteresis 20 ⁰C OVP threshold rising (fault latched, % of 0.6V < VREF < 1.87 V 111 PGOOD asserted) VREF VFB_OVP OVP threshold falling (fault cleared, % of 0.6 V < VREF < 1.87 V 104 PGOOD deasserted) VREF Time after OVP before protection tOVPSDOWN 55 95 µs activation and PGOOD fall Undervoltage threshold (PGOOD % of 0.6 V < VREF < 1.87 V 92 deasserted) VREF VFB UVP Undervoltage Threshold (PGOOD % of 0.6 V < VREF < 1.87 V 83 asserted) VREF tUVPSDOWN Time after UVP before PGOOD fall 55 95 µs (2) Specified by lab validation. 8 Submit Documentation Feedback Copyright © 2014–2015, Texas Instruments Incorporated Product Folder Links: TPS65400 |
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