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LM5025C Datasheet(PDF) 6 Page - Texas Instruments |
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LM5025C Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 22 page  LM5025C SNVS568C – SEPTEMBER 2008 – REVISED MARCH 2013 www.ti.com Electrical Characteristics (continued) Specifications with standard typeface are for TJ = 25°C, and those with boldface type apply over full Operating Junction Temperature range. VIN = 48V, VCC = 10V, RT = 32 kΩ, RSET = 27.4 kΩ) unless otherwise stated (1) Symbol Parameter Conditions Min Typ Max Units CS2 Prop CS2 Delay to Output CS2 Step from 0 to 0.6V 50 ns Time to onset of OUT Transition (90%) Cgate = 0 Cycle by Cycle Threshold 0.45 0.5 0.55 V Voltage (CS1) Cycle Skip Threshold Resets SS capacitor; auto 0.45 0.5 0.55 V Voltage (CS2) restart Leading Edge Blanking 50 ns Time (CS1) CS1 Sink Impedance CS1 = 0.4V 30 50 Ω (clocked) CS1 Sink Impedance CS1 = 0.6V 15 30 Ω (Post Fault Discharge) CS2 Sink Impedance CS2 = 0.6V 55 85 Ω (Post Fault Discharge) CS1 and CS2 Leakage CS = CS Threshold - 100mV 1 µA Current Soft-Start Soft-start Current Source 65 90 115 µA Normal Soft-start Current Source 0.5 1 1.5 µA following a CS2 event Oscillator Frequency1 TA = 25°C 180 200 220 kHz TJ = Tlow to Thigh 175 225 Frequency2 RT = 10.8 k Ω 510 580 650 kHz Sync threshold 2 V Min Sync Pulse Width 100 ns Sync Frequency Range 160 kHz PWM Comparator Delay to Output COMP step 5V to 0V 40 ns Time to onset of OUT_A transition low Duty Cycle Range 0 91 % COMP to PWM Offset 0.7 1 1.3 V COMP Open Circuit 4.3 5.9 V Voltage COMP Short Circuit COMP = 0V 0.6 1 1.4 mA Current Volt x Second Clamp Ramp Clamp Level Delta RAMP measured from 2.4 2.5 2.6 V onset of OUT_A to Ramp peak. COMP = 5V UVLO Shutdown Undervoltage Shutdown 2.44 2.5 2.56 V Threshold Undervoltage Shutdown 16 20 24 µA Hysteresis Output Section OUT_A High Saturation MOS Device @ Iout = -10mA, 5 10 Ω 6 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM5025C |
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