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LM10010 Datasheet(PDF) 7 Page - Texas Instruments |
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LM10010 Datasheet(HTML) 7 Page - Texas Instruments |
7 / 17 page rise Edge-Detector fall VIDA UVLO D Q Q R UVLO rise fall VID[3] Bandgap Core + - IREF 6 bit IDAC IDAC_OUT (0 - 59.2 uA) UVLO (VDD > 2.65V) PRECISION ENABLE (1.34V) VDD EN DISABLE GND Slew Limit Logic Receiver Update DAC VIDB VIDC VIDS 3 Ps deglitch Logic Receiver 3 Ps deglitch Logic Receiver 3 Ps deglitch Logic Receiver 6 Ps deglitch VID[0] D Q Q R UVLO D Q Q R UVLO rise fall VID[4] VID[1] D Q Q R UVLO D Q Q R UVLO rise fall VID[5] VID[2] D Q Q R 3 Ps deglitch LM10010 www.ti.com SNVS717C – JULY 2011 – REVISED MARCH 2013 BLOCK DIAGRAM Figure 13. LM10010 Block Diagram FUNCTIONAL DESCRIPTION General The LM10010 is a precision current DAC used for controlling any point of load regulator with an adjustable resistor feedback network. Four communication lines are used to write to a 6-bit IDAC value. The output of the IDAC is used to send current to the feedback node of a regulator, adjusting the output voltage. With this method, it is possible to precisely control the output voltage of the regulator. An enable pin (EN) is provided to allow for a reduced quiescent current when not in use. Also, the VDD line is monitored so that an under-voltage event will shut down the device. The device is available in a 10-pad No-Pullback Leadless Leadframe Package (WSON-10). The LM10010 can be used in numerous applications with regulators from 3.0V to 5.5V supplies. A block diagram of the LM10010 is shown in Figure 13 above. Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: LM10010 |
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