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NB3L8543SDTR2G Datasheet(PDF) 5 Page - ON Semiconductor

Part # NB3L8543SDTR2G
Description  2.5 V/3.3 V Differential 2:1 MUX to 4 LVDS Clock Fanout Buffer Outputs
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NB3L8543SDTR2G Datasheet(HTML) 5 Page - ON Semiconductor

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NB3L8543S
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Table 5. DC CHARACTERISTICS VDD = 2.5 V ±5% or 3.3 V ±10%, GND = 0 V, TA = −40°C to +85°C (Note 5)
Symbol
Characteristic
Min
Typ
Max
Unit
POWER SUPPLY
VDD
Power Supply Voltage
VDD = 3.3 V
VDD = 2.5 V
2.97
2.375
3.3
2.5
3.63
2.625
V
IDD
Power Supply Current
50
mA
LVCMOS/LVTTL INPUTS (CLK_EN, CLK_SEL, OE)
VIH
Input HIGH Voltage
VDD = 3.3 V
VDD = 2.5 V
2
1.7
VDD + 0.3
V
VIL
Input LOW Voltage
VDD = 3.3 V
VDD = 2.5 V
0.8
0.7
V
IIH
Input High Current (VDD = VIN = 3.63 V)
CLK_EN, OE
CLK_SEL
5
150
mA
IIL
Input LOW Current (VDD = 3.63 V, VIN = 0 V)
CLK_EN, OE
CLK_SEL
−150
−5
mA
DIFFERENTIAL INPUTS (see Figures 5 and 6) (Note 8)
VIHD
Differential Input HIGH Voltage
CLK
PCLK
0.5
1.5
VDD−0.85
VDD
V
VILD
Differential Input LOW Voltage
CLK
PCLK
0
0.5
VIHD−0.15
VIHD
V
VID
Differential Input Voltage (VIHD − VILD)
CLK
PCLK
0.15
0.30
1.3
1.0
V
VIHCMR
Common Mode Input Voltage; (Note 9)
CLK
PCLK
0.5
1.5
VDD–0.85
VDD
V
IIH
Input HIGH Current
VDD = VIN = 3.63 V CLK, PCLK
CLK, PCLK
150
5
mA
IIL
Input LOW Current
VDD = 3.63 V, VIN = 0 V CLK, PCLK
CLK, PCLK
−5
−150
mA
LVDS OUTPUTS
VOD
Differential Output Voltage
200
300
360
mV
DVOD
VOD Magnitude Change
0
40
mV
VOS
Differential Output Voltage Offset Voltage
1.125
1.25
1.375
V
DVOS
VOS Magnitude Change
5
25
mV
IOZ
Output High Impedance Leakage Current
−10
+10
mA
IOS
Output Short Circuit Current
−5
mA
VOH
Output HIGH Voltage
1.34
1.6
V
VOL
Output LOW Voltage
0.9
1.06
V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Outputs terminated 100 W across Qx and Qx, see Figure 4. DC Measurements per Figure 10 reference.
6. Vth, VIH, VIL, and VISE parameters must be complied with simultaneously.
7. Vth is applied to the complementary input when operating in single−ended mode.
8. VIHD, VILD, VID and VCMR parameters must be complied with simultaneously.
9. The common mode voltage is defined as VIH.


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