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NCP51402MNTXG Datasheet(PDF) 5 Page - ON Semiconductor |
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NCP51402MNTXG Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 7 page NCP51402 www.onsemi.com 5 General The NCP51402 is a sink/source tracking termination regulator specifically designed for low input voltage and low external component count systems where space is a key application parameter. The NCP51402 integrates a high−performance, low−dropout (LDO) linear regulator that is capable of both sourcing and sinking current. The LDO regulator employs a fast feedback loop so that small ceramic capacitors can be used to support the fast load transient response. To achieve tight regulation with minimum effect of trace resistance, a remote sensing terminal, VTTS, should be connected to the positive terminal of the output capacitors as a separate trace from the high current path from VTT. VRI − Generation of Internal Voltage Reference The output voltage, VTT, is regulated to VRO. When VRI is configured for standard DDR termination applications, VRI can be set by an external equivalent ratio voltage divider connected to the memory supply bus (VDDQ). The NCP51402 supports VRI voltage from 0.5 V to 1.8 V, making it versatile and ideal for many types of low−power LDO applications. VRO − Reference Output When it is configured for DDR termination applications, VRO generates the DDR VTT reference voltage for the memory application. It is capable of supporting both a sourcing and sinking load of 10 mA. VRO becomes active when VRI voltage rises to 435 mV and VCC is above the UVLO threshold. When VRO is less than 360 mV, it is disabled and subsequently discharges to GND through an internal 10 k W MOSFET. VRO is independent of the EN pin state. EN − Enable Control When EN is driven high, the NCP51402 VTT regulator begins normal operation. When EN is driven low, VTT is discharges to GND through an internal 18− W MOSFET. VREF remains on when EN is driven low. PGOOD − PowerGood The NCP51402 provides an open−drain PGOOD output that goes high when the VTT output is within ±20% of VRO. PGOOD de−asserts within 10 ms after the output exceeds the limits of the PowerGood window. During initial VTT startup, PGOOD asserts high 2 ms after the VTT enters power good window. Because PGOOD is an open−drain output, a 100 k W, pull−up resistor between PGOOD and a stable active supply voltage rail is required. The LDO has a constant over−current limit (OCL). Note that the OCL level reduces by one−half when the output voltage is not within the power good window. This reduction is non−latch protection. For VCC under−voltage lockout (UVLO) protection, the NCP51402 monitors VCC voltage. When the VCC voltage is lower than the UVLO threshold voltage, both the VTT and VRO regulators are powered off. This shutdown is also non−latch protection. Thermal Shutdown with Hysteresis If the NCP51402 is to operate in elevated temperatures for long durations, care should be taken to ensure that the maximum operating junction temperature is not exceeded. To guarantee safe operation, the NCP51402 provides on−chip thermal shutdown protection. When the chip junction temperature exceeds 150 °C, the part will shutdown. When the junction temperature falls back to 125 °C, the device resumes normal operation. If the junction temperature exceeds the thermal shutdown threshold then the VTT and VRO regulators are both shut off, discharged by the internal discharge MOSFETs. The shutdown is a non−latch protection. Tracking Startup and Shutdown The NCP51402 also supports tracking startup and shutdown when EN is tied directly to the system bus and not used to turn on or turn off the device. During tracking startup, VTT follows VRO once VRI voltage is greater than 435 mV. VRI follows the rise of VDDQ memory supply rail via a voltage divider. PGOOD is asserted 2 ms after VTT is within ±20% of VRO. During tracking shutdown, VTT falls following VRO until VRO reaches 360 mV. Once VRO falls below 360 mV, the internal discharge MOSFETs are turned on and quickly discharge both VRO and VTT to GND. PGOOD is de−asserted once VTT is beyond the ±20% range of VRO. |
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