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C2012X7R1A106K125AC Datasheet(PDF) 9 Page - ON Semiconductor |
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C2012X7R1A106K125AC Datasheet(HTML) 9 Page - ON Semiconductor |
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9 / 16 page  NCP6323, NCV6323 www.onsemi.com 9 DETAILED DESCRIPTION General The NCP/NCV6323 is a synchronous buck converter which is optimized to supply different sub−systems of portable applications powered by one cell Li−ion or three cell Alkaline/NiCd/NiMH batteries. The devices are able to deliver up to 2 A on an external adjustable voltage. Operation with 3 MHz switching frequency allows employing small size inductor and capacitors. Input supply voltage feedforward control is employed to deal with wide input voltage range. Synchronous rectification offer improved system efficiency. PWM Mode Operation In medium and heavy load range, the inductor current is continuous and the device operates in PWM mode with fixed switching frequency, which has a typical value of 3 MHz. In this mode, the output voltage is regulated by on−time pulse width modulation of an internal P−MOSFET. An internal N−MOSFET operates as synchronous rectifier and its turn−on signal is complimentary to that of the P−MOSFET. Undervoltage Lockout The input voltage VIN must reach or exceed 2.5 V (typical) before the NCP/NCV6323 enables the converter output to begin the start up sequence. The UVLO threshold hysteresis is typically 100 mV. Enable The NCP/NCV6323 has an enable logic input pin EN. A high level (above 1.1 V) on this pin enables the device to active mode. A low level (below 0.4 V) on this pin disables the device and makes the device in shutdown mode. There is an internal filter with 5 ms time constant. The EN pin is pulled down by an internal 10 nA sink current source. In most of applications, the EN signal can be programmed independently to VIN power sequence. Figure 19. Power Good and Active Discharge Timing Diagram Power Good Output The device monitors the output voltage and provides a power good output signal at the PG pin. This pin is an open−drain output pin. To indicate the output of the converter is established, a power good signal is available. The power good signal is low when EN is high but the output voltage has not been established. Once the output voltage of the converter drops out below 90% of its regulation during operation, the power good signal is pulled low and indicates a power failure. A 5% hysteresis is required on power good comparator before signal going high again. Soft−Start A soft start limits inrush current when the converter is enabled. After a minimum 300 ms delay time following the enable signal, the output voltage starts to ramp up in 100 ms (NCV6323) / 240 ms (NCP6323) (for external adjustable voltage devices) or with a typical 10 V/ms slew rate (for fixed voltage devices). Active Output Discharge An output discharge operation is active in when EN is low. A discharge resistor (500 W typical) is enabled in this condition to discharge the output capacitor through SW pin. |
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