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UCC28063ADR Datasheet(PDF) 8 Page - Texas Instruments

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Part # UCC28063ADR
Description  Natural Interleaving Transition-Mode PFC Controller With Improved Audible and Input Surge Noise Immunity
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

UCC28063ADR Datasheet(HTML) 8 Page - Texas Instruments

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UCC28063A
SNVSA88B – DECEMBER 2014 – REVISED MARCH 2015
www.ti.com
Electrical Characteristics (continued)
At VCC = 16 V, AGND = PGND = 0 V, VINAC = 3 V, VSENSE = 6 V, HVSEN = 3 V, PHB = 5 V, RTSET = 133 kΩ, all voltages
are with respect to GND, all outputs unloaded,
−40 °C < TJ = TA < 125 °C, and currents are positive into and negative out of
the specified terminal, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CS current-limit response
From CS exceeding threshold
−0.05 V to
60
100
time(2)
GDx dropping 10%
ns
CS blanking time
From GDx rising and falling edges
100
VINAC INPUT
IVINAC
VINAC input bias current,
VINAC = 2 V
±0.03
±0.5
µA
above brownout
VBODET
VINAC brownout detection
VINAC falling
1.33
1.39
1.44
V
threshold
tBODLY
VINAC brownout filter time
VINAC below the brownout detection
340
440
540
ms
threshold for the brownout filter time
VBOHYS
VINAC brownout threshold
VINAC rising
30
62
75
mV
hysteresis
IBOHYS
VINAC brownout hysteresis
VINAC = 1 V for > tBODLY
1.6
2
2.5
µA
current
VDODET
VINAC dropout detection
VINAC falling
0.315
0.35
0.38
V
threshold
tDODLY
VINAC dropout filter time
VINAC below the dropout detection
3.5
5
7
ms
threshold for the dropout filter time
VDOCLR
VINAC dropout clear threshold
VINAC rising
0.67
0.71
0.75
V
PULSE-WIDTH MODULATOR
KT
On-time factor, phases A and B
VSENSE = 5.8 V(4)
3.6
4.0
4.4
µs/V
KTS
On-time factor, single-phase, A
VSENSE = 5.8 V, PHB = 0 V (4)
7.2
8.0
8.9
Phase B to phase A on-time
VSENSE = 5.8 V
±2%
±6%
matching error
Zero-crossing distortion
COMP = 0.25 V, VINAC = 1 V
1.2
2
2.8
µs
correction additional on time
COMP = 0.25 V, VINAC = 0.1 V
12.6
20
29
VPHBF
PHB threshold falling, to single-
To GDB output shutdown, VINAC = 1.5 V
0.7
0.8
0.9
phase operation
V
VPHBR
PHB threshold rising, to two-
To GDB output running, VINAC = 1.5 V
0.9
1
1.1
phase operation
TMIN
Minimum switching period
RTSET = 133 kΩ
(4)
1.7
2.2
3
µs
TSTART
PWM restart time
ZCDA = ZCDB = 2 V(5)
165
210
265
THERMAL SHUTDOWN
TJ
Thermal shutdown temperature
Temperature rising(6)
160
°C
TJ
Thermal restart temperature
Temperature falling(6)
140
(4)
Gate drive on-time is proportional to (VCOMP – 0.125 V). The on-time proportionality factor, KT, scales linearly with the value of RTSET
and is different in two-phase and single-phase modes. The minimum switching period is proportional to RTSET.
(5)
An output on-time is generated at both GDA and GDB if both ZCDA and ZCDB negative-going edges are not detected for the restart
time. In single-phase mode, the restart time applies for the ZCDA input and the GDA output.
(6)
Thermal shutdown occurs at temperatures higher than the normal operating range. Device performance above the normal operating
temperature is not specified or assured.
8
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