LE25U40PCMC

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3-2. Status register write

The information in status registers BP0, BP1, BP2, TB and SRWP can be rewritten using the status register write

command. RDY, WEN and bit 6 are read-only bits and cannot be rewritten. The information in bits BP0, BP1, BP2,

TB and SRWP is stored in the non-volatile memory, and when it is written in these bits, the contents are retained even

at power-down. "Figure 6 Status Register Write" shows the timing waveforms of status register write, and Figure 20

shows a status register write flowchart. Consisting of the first and second bus cycles, the status register write

command initiates the internal write operation at the rising CS edge after the data has been input following (01h).

Erase and program are performed automatically inside the device by status register write so that erasing or other

processing is unnecessary before executing the command. By the operation of this command, the information in bits

BP0, BP1, BP2, TB and SRWP can be rewritten. Since bits RDY (bit 0), WEN (bit 1) and bit 6 of the status register

cannot be written, no problem will arise if an attempt is made to set them to any value when rewriting the status

register. Status register write ends can be detected by RDY of status register read. To initiate status register write, the

logic level of the WP pin must be set high and status register WEN must be set to "1".

Figure 6 Status Register Write

3-3. Contents of each status register

RDY (Bit 0)

The RDY register is for detecting the write (program, erase and status register write) end. When it is "1", the device is

in a busy state, and when it is "0", it means that write is completed.

WEN (bit 1)

The WEN register is for detecting whether the device can perform write operations. If it is set to "0", the device will

not perform the write operation even if the write command is input. If it is set to "1", the device can perform write

operations in any area that is not block-protected.

WEN can be controlled using the write enable and write disable commands. By inputting the write enable command

(06h), WEN can be set to "1"; by inputting the write disable command (04h), it can be set to "0." In the following

states, WEN is automatically set to "0" in order to protect against unintentional writing.

 At power-on

 Upon completion of small sector erase, sector erase or chip erase

 Upon completion of page program

 Upon completion of status register write

* If a write operation has not been performed inside the LE25U40PCMC because, for instance, the command input for

any of the write operations (small sector erase, sector erase, chip erase, page program, or status register write) has

failed or a write operation has been performed for a protected address, WEN will retain the status established prior

to the issue of the command concerned. Furthermore, its state will not be changed by a read operation.

tSRW

Self-timed

Write Cycle

SCK

SI

High Impedance

SO

CS

DATA

01h

15

0

1

2

3

4

5

6

7

8

Mode3

Mode0

8CLK

WP

tWPH

tWPS

MSB