LC89075WA datasheet(4/70 Pages) ONSEMI

Part #	LC89075WA

Description	Digital Audio Interface Receiver

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Manufacturer	ONSEMI [ON Semiconductor]

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LC89075WA

No.A2170-4/70

5. Pin Functions

Table 5.1 Pin Functions

No

Name

I/O

Function

1

LPF

O

PLL: Loop filter connection pin

2

PGND

PLL: Analog GND

3

MCKIN

I

Group A

: Master clock input pin

to [MCKOUT], [MPOUT1]

Group A+B

: Master clock input pin

to [MCKOUT]

4

BCKIN

I

Group A

: Bit clock input pin

to [BCKOUT], [MPOUT2]

Group A+B

: Bit clock input pin

to [BCKOUT]

5

LRCKIN

I

Group A

: LR clock input pin

to [LRCKOUT], [MPOUT3]

Group A

: DSD data input pin

to [LRCKOUT], [MPOUT3]

Group A+B

: LR clock input pin

to [LRCKOUT]

6

DATAIN

I

Group A

: 2ch audio data input pin

to [DATAOUT], [MPOUT4]

Group A

: DSD data input pin

to [DATAOUT], [MPOUT4]

Group A+B

: 1, 2ch/8ch audio data input pin

to [DATAOUT]

7

MPIN1

I

Group B

: Master clock input pin

to [MCKOUT], [MPOUT1]

Group A+B

: 3, 4ch/8ch audio data input pin

to [MPOUT1]

8

MPIN2

I

Group B

: Bit clock input pin

to [BCKOUT], [MPOUT2]

Group A+B

: 5, 6ch/8ch audio data input pin

to [MPOUT2]

9

MPIN3

I

Group B

: LR clock input pin

to [LRCKOUT], [MPOUT3]

Group B

: DSD data input pin

to [LRCKOUT], [MPOUT3]

Group A+B

: 7, 8ch/8ch audio data input pin

to [MPOUT3]

10

MPIN4

I

Group B

: 2ch audio data input pin

to [DATAOUT], [MPOUT4]

Group B

: DSD data input pin

to [DATAOUT], [MPOUT4]

Group B

: 1, 2ch/6ch audio data input pin

to [DATAOUT]

Group A+B

: External error signal input pin

to [ERRF]

11

MPIN5

I

Group B

: 3, 4ch/6ch audio data input pin

to [MPOUT1]

Group A+B

: External data mute signal input pin

to [MUTEB]

12

MPIN6

I

Group B

: 5, 6ch/6ch audio data input pin

to [MPOUT2]

Group A+B

: External non-PCM signal input pin

to [NPCMF]

13

MCKOUT

O

Master clock output pin

from ADC, DIR, [MCKIN], [MPIN1], [MPIO1], [RXIN8]

14

BCKOUT

O

Bit clock output pin

from ADC, DIR, [BCKIN], [MPIN2], [MPIO2], [RXIN7]

15

LRCKOUT

O

LR clock output pin

from ADC, DIR, [LRCKIN], [MPIN3], [MPIO3], [RXIN6]

DSD data output pin

from [LRCKIN], [MPIN3], [MPIO3], [RXIN6]

16

DATAOUT

O

2ch audio data output pin

from ADC, DIR, [DATAIN], [MPIN4], [MPIO4], [RXIN5]

DSD data output pin

from [DATAIN], [MPIN4], [MPIO4], [RXIN5]

1, 2ch/6ch audio data output pin

from [MPIN4]

1, 2ch/8ch audio data output pin

from [DATAIN]

17

DGND

Digital GND

18

DVDD

Digital power supply (3.3V)

19

MPOUT1

O

Master clock output pin

from ADC, [MCKIN], [MPIN1], [MPIO1], [RXIN8]

3, 4ch/6ch audio data output pin

from [MPIN5]

3, 4ch/8ch audio data output pin

from [MPIN1]

20

MPOUT2

O

Bit clock output pin

from ADC, [BCKIN], [MPIN2], [MPIO2], [RXIN7]

5, 6ch/6ch audio data output pin

from [MPIN6]

5, 6ch/8ch audio data output pin

from [MPIN2]

21

MPOUT3

O

LR clock output pin

from ADC, [LRCKIN], [MPIN3], [MPIO3], [RXIN6]

DSD data output pin

from [LRCKIN], [MPIN3], [MPIO3], [RXIN6]

7, 8ch/8ch audio data output pin

from [MPIN3]

Continued on next page.

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