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MUN5214DW1 Datasheet(PDF) 1 Page - ON Semiconductor |
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MUN5214DW1 Datasheet(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2014 September, 2014 − Rev. 2 1 Publication Order Number: DTC114YD/D MUN5214DW1, NSBC114YDXV6, NSBC114YDP6 Dual NPN Bias Resistor Transistors R1 = 10 kW, R2 = 47 kW NPN Transistors with Monolithic Bias Resistor Network This series of digital transistors is designed to replace a single device and its external resistor bias network. The Bias Resistor Transistor (BRT) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. Features • Simplifies Circuit Design • Reduces Board Space • Reduces Component Count • S and NSV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC-Q101 Qualified and PPAP Capable* • These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant MAXIMUM RATINGS (TA = 25°C, common for Q1 and Q2, unless otherwise noted) Rating Symbol Max Unit Collector-Base Voltage VCBO 50 Vdc Collector-Emitter Voltage VCEO 50 Vdc Collector Current − Continuous IC 100 mAdc Input Forward Voltage VIN(fwd) 40 Vdc Input Reverse Voltage VIN(rev) 6 Vdc Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ORDERING INFORMATION Device Package Shipping† MUN5214DW1T1G, SMUN5214DW1T1G* SOT−363 3,000 / Tape & Reel NSVMUN5214DW1T3G* SOT−363 10,000 / Tape & Reel NSBC114YDXV6T1G NSVBC114YDXV6T1G SOT−563 4,000 / Tape & Reel NSBC114YDXV6T5G SOT−563 8,000 / Tape & Reel NSBC114YDP6T5G SOT−963 8,000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com MARKING DIAGRAMS PIN CONNECTIONS 7D M G G 1 6 7D M G G 1 7D/P = Specific Device Code M = Date Code* G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending up- on manufacturing location. SOT−363 CASE 419B SOT−563 CASE 463A Q1 Q2 (1) (2) (3) (6) (5) (4) R1 R2 R2 R1 SOT−963 CASE 527AD PM G G 1 |
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