ESD8118

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ESD Protection Device Technology

ON Semiconductor’s portfolio contains three main

technologies for low capacitance ESD protection device

which are highlighted below and in Figure 16.

technology has a higher breakdown voltage (VBR)

limiting it to protecting chipsets with larger geometries.

technology. The key advatange for this technology is a

low holding voltage (VH) which produces a deeper

snapback that results in lower voltage over high

currents as shown in the TLP results in Figure 17. This

technology provides optimized protection for chipsets

with small geometries against thermal failures resulting

in chipset damage (also known as “hard failures”).

type technology. The key advatange for this technology

is a very low turn-on voltage. This technology provides

optimized protection for chipsets with small geometries

against recoverable failures due to voltage peaks (also

known as “soft failures”).

Figure 16. ON Semiconductor’s Low-cap ESD Technology Portfolio

Figure 17. High Current, TLP, IV Characteristic of Each Technology

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