NIMD6001N, NIMD6001AN

http://onsemi.com

2

PIN DESCRIPTIONS

Pin #

Symbol

Description

1

S1

FET 1 Source and Body

2

G1

FET 1 Gate

3

S2

FET 2 Source and Body

4

G2

FET 2 Gate

5

Diag/Fbk

Diagnostic Feedback − This pin will be logic high when either FET Drain-Source voltage exceeds the Drain

Diagnostic threshold.

6

D2

FET 2 Drain

7

Disable

Gate Disable − Pull this pin low to disable both FETs. A logic low will override voltage applied to G1 or G2.

8

D1

FET 1 Drain

THERMAL RESISTANCE

Parameter

Symbol

Value

Units

Junction-to-Ambient − min. pad footprint (Notes 1 and 2)

96

°C/W

Junction-to-Ambient − 1″ Cu pad (Notes 1 and 3)

75

Parameter

Symbol

Test Condition

Min

Typ

Max

Units

OFF CHARACTERISTICS

Drain-to-Source Breakdown Voltage

60

67

V

Zero Gate Voltage Drain Current

(Note 1)

10

80

20

250

mA

Gate Input Current

−100

±25

+100

nA

ON CHARACTERISTICS

Gate Threshold Voltage

1.0

1.7

3.0

Static Drain-to-Source On-Resistance

60

110

mW

Static Drain-to-Source On-Resistance

72

130

mW

DYNAMIC CHARACTERISTICS (Note 1)

Input Capacitance

f = 75 kHz

150

175

pF

Output Capacitance

150

170

Reverse Transfer Capacitance

25

30

Gate Resistance

8

15

kW

Total Gate Charge

8.3

9.0

nC

Gate-to-Source Gate Charge

1.1

1.6

Gate-to-Drain Miller Charge

4.2

5

1. These values are established by statistical characterization and may not be tested.

2. Surface-mounted on FR4 board using the minimum recommended pad size (Cu area = 40 sq. mm; 1 oz.)

3. Surface-mounted on FR4 board using 1 sq. inch heat spreader (Cu area = 625 sq. mm, 2 oz.)

4. Refer to Figure 1 for definition of switching characteristics symbols.