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NCP3231A Datasheet(PDF) 4 Page - ON Semiconductor |
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NCP3231A Datasheet(HTML) 4 Page - ON Semiconductor |
4 / 14 page NCP3231A www.onsemi.com 4 Figure 2. Typical Application Circuit FB EN VIN BST VSWH VSW PGND COMP OTS PG VB SS NCP3231A VIN VOUT VPG ISET VCC AGND ABSOLUTE MAXIMUM RATINGS (measured vs. GND pad, unless otherwise noted) Rating Symbol Value Unit Power Supply to GND VIN, VCC 20.5 −0.3 V VSW to GND VSWH, VSW 26 −0.6 (DC) +35 (t < 50 ns) −5 (t < 100 ns) V BST to GND BST 30 (DC) −0.6 (DC) +40 (t < 50 ns) V All other pins 6.0 −0.3 V Operating Ambient Temperature Range (Note 1) TA −40 to +90 °C Operating Junction Temperature Range (Note 1) TJ −40 to +150 °C Maximum Junction Temperature TJ(MAX) +150 °C Storage Temperature Range Tstg −55 to +150 °C Electrostatic Discharge − Human Body Model HBM 1.0 kV Electrostatic Discharge − Charge Device Model CDM 2.0 kV THERMAL INFORMATION HS FET Junction-to-Case Thermal Resistance (Note 2) RqJC−HS 1.3 °C/W LS FET Junction-to-Case Thermal Resistance (Note 2) RqJC−LS 0.6 °C/W Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. The maximum package power dissipation limit must not be exceeded. P D + T J(MAX) * TA RqJA 2. RqJC thermal resistance is obtained by simulating a cold plate test on the exposed power pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30−88. |
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