ISO-CMOS

MT8806

3-13

† Timing is over recommended temperature range. See Fig. 3 for control and I/O timing details.

‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.

Crosstalk measurements are for Plastic DIPS only, crosstalk values for PLCC packages are approximately 5dB better.

† Timing is over recommended temperature range.

See Fig. 3 for control and I/O timing details.

Digital Input rise time (tr) and fall time (tf) = 5ns.

‡ Typical figures are at 25°C and are for design aid only; not guaranteed and not subject to production testing.

Characteristics

Sym

Min

Max

Units

Test Conditions

1

Switch I/O Capacitance

20

pF

f=1 MHz

2

Feedthrough Capacitance

0.2

pF

f=1 MHz

3

Frequency Response

Channel “ON”

45

MHz

See Appendix, Fig. A.3

4

Total Harmonic Distortion

(See G.5, G.6 in Appendix)

THD

0.01

%

5

Feedthrough

Channel “OFF”

(See G.8 in Appendix)

FDT

-95

dB

2Vpp sinewave; f= 1kHz;

See Appendix, Fig. A.4

6

Crosstalk between any two

channels for switches Xi-Yi and

Xj-Yj.

(See G.7 in Appendix).

-45

dB

-90

dB

-85

dB

-80

dB

Refer to Appendix, Fig. A.5

for test circuit.

7

Propagation delay through

switch

30

ns

Characteristics

Sym

Min

Max

Units

Test Conditions

1

Control Input crosstalk to switch

(for CS, DATA, STROBE, Address)

30

mVpp

See Appendix, Fig. A.6

2

Digital Input Capacitance

10

pF

f=1MHz

3

Switching Frequency

20

MHz

4

Setup Time DATA to STROBE

10

ns

5

Hold Time DATA to STROBE

10

ns

6

Setup Time Address to STROBE

10

ns

7

Hold Time Address to STROBE

10

ns

8

Setup Time CS to STROBE

10

ns

9

Hold Time CS to STROBE

10

ns

10

STROBE Pulse Width

20

ns

11

RESET Pulse Width

40

ns

12

STROBE to Switch Status Delay

40

100

ns

13

DATA to Switch Status Delay

50

100

ns

14

RESET to Switch Status Delay

35

100

ns