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AMIS-52150 Datasheet(PDF) 7 Page - ON Semiconductor |
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AMIS-52150 Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 21 page AMIS−52150 http://onsemi.com 7 CREF, Current Reference Bias Pin A resistor must be connected to the CREF pin to provide a current bias to the internal bandgap voltage reference circuit. It is critical that this resistor value is 33.2 k W (with one percent or better tolerance) to achieve proper operation of the bandgap voltage reference. GND, Ground Pin The GND pin is the ground connection for the digital and analog circuits. CLKOUT, Internal Clock Output Pin The CLKOUT pin is an output for the RC oscillator, crystal oscillator signal or the recovered data clock, respectively. The crystal oscillator signal output can be divided by 2, 3 or 4. The pin can also be programmed to output the signal from the recovered data clock function. For more information about the clock and data recovery (CDR) function of the AMIS−52150, refer to the section of this document on clock and data recovery. The CLKOUT pin function control registers are shown in Table 8. Table 8. OSCILLATOR OUTPUT CONTROL REGISTERS CLKOUT Pin Definition Control Registers Register (HEX) Name Bits States Comments 0x0c CLKOUT Enable 7 0 CLKOUT is Enabled 1 CLKOUT is Disabled 0x0d CLKOUT Select 4, 5 00 Automatic Control 01 RC OSC 10 Xtal 11 Off 0x0e XTAL Divide 0, 1 00 Divide by 4 01 Divide by 3 10 Divide by 2 11 Divide by 1 X1, X2, External Crystal Reference Pins X1 and X2 pins connect a parallel resonance oscillator crystal to the AMIS−52150 internal oscillator circuit. The external crystal should meet the requirements as listed in Table 9. However, the two load capacitors should be sized slightly smaller than the recommended value for the crystal, because of the added capacitance due to the internal trim circuit. The crystal parameters are shown in Table 9. Table 9. EXTERNAL CRYSTAL PARAMETERS Parameter Min Typ Max Unit Conditions Crystal Frequency 12.56 − 12.65 MHz Targeted 9.375 − 24.0 Non-quick Start 10.9 − 14.0 Quick Start Crystal ESR − − 70 W Crystal Tolerance − 10 − ppm Load Capacitance Load Capacitors should be Smaller than Recommended for the Crystal to allow for Frequency Tuning I2CDATA, I2CCLK, I2C Control Interface Bus Pins The AMIS−52150 implements an I2C serial 8-bit bi-directional interface with the pins I2CDATA and I2CCLK. The device implements the protocol for a slave device. The clock for the interface is generated by the external master device. The interface will support the normal (0 – 100 kbits/second) or the fast (0 – 400 kbits/second) data modes. The interface conforms to the Phillips specification for the I2C bus standard. The pins have internal pull-up resistors. See Table 10 and Table 11 for some parameters of this interface. In addition, Table 12 shows the details of register that controls the I2C address increment function. Table 10. INTERNAL I2C PULL-UP RESISTORS Pin Function Typ Unit I2CDATA Internal Pull-up R 15 kW I2CCLK Internal Pull-up R 15 kW |
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