ASM2I9940L

http://onsemi.com

6

Symbol

Characteristic

Condition

Min

Typ

Max

Unit

Maximum Input Frequency

200

MHz

Propagation Delay

PECL_CLK v 150 MHz

CMOS_CLK v 150 MHz

(Note 7)

2.6

2.3

4.0

3.1

5.2

4.0

nS

Propagation Delay

PECL_CLK > 150 MHz

CMOS_CLK > 150 MHz

2.8

2.3

3.8

3.1

5.0

4.0

nS

Output−to−output Skew

Within one bank

PECL_CLK

CMOS_CLK

(Note 7)

200

200

pS

Part–to–Part Skew

PECL_CLK ≤ 150 MHz

CMOS_CLK ≤ 150 MHz

(Notes 7 and 8)

2.6

1.7

nS

Part–to–Part Skew

PECL_CLK > 150 MHz

CMOS_CLK > 150 MHz

(Notes 7 and 8)

2.2

1.7

nS

Part–to–Part Skew

PECL_CLK

CMOS_CLK

(Notes 7 and 9)

1.2

1.0

nS

DC

Output Duty Cycle

Input DC = 50%

Input DC = 50%

45

40

50

50

55

60

%

Output Rise/Fall Time

0.5 – 1.8 V

0.3

1.2

nS

7. Tested using standard input levels, Production tested @ 150 MHz.

8. Across temperature and voltage ranges, includes output skew.

9. For a specific temperature and voltage, includes output skew.

Pulse

Generator

Z=50

Ω

Ω

Ω

Ω

=50

Ω

ASM2I9940L

Differential

Pulse Generator

Z=50

Ω

Ω

=50

Ω

TT

Ω

Ω

ASM2I9940L

V