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MT8889CN Datasheet(PDF) 3 Page - Mitel Networks Corporation

Part # MT8889CN
Description  Integrated DTMFTransceiver with Adaptive Micro Interface
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Manufacturer  MITEL [Mitel Networks Corporation]
Direct Link  http://www.mitel.com
Logo MITEL - Mitel Networks Corporation

MT8889CN Datasheet(HTML) 3 Page - Mitel Networks Corporation

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MT8889C/MT8889C-1
4-109
Functional Description
The
MT8889C/MT8889C-1
Integrated
DTMF
Transceiver consists of a high performance DTMF
receiver with an internal gain setting amplifier and a
DTMF generator, which employs a burst counter to
synthesize precise tone bursts and pauses. A call
progress mode can be selected so that frequencies
within the specified passband can be detected. The
adaptive micro interface allows microcontrollers,
such as the 68HC11, 80C51 and TMS370C50, to
access the MT8889C/MT8889C-1 internal registers.
Input Configuration
The input arrangement of the MT8889C/MT8889C-1
provides a differential-input operational amplifier as
well as a bias source (VRef), which is used to bias the
inputs at VDD/2. Provision is made for connection of
a feedback resistor to the op-amp output (GS) for
gain adjustment. In a single-ended configuration, the
input pins are connected as shown in Figure 3.
Figure 4 shows the necessary connections for a
differential input configuration.
Receiver Section
Separation of the low and high group tones is
achieved by applying the DTMF signal to the inputs
of two sixth-order switched capacitor bandpass
filters, the bandwidths of which correspond to the low
and high group frequencies (see Table 1). The filters
also incorporate notches at 350 Hz and 440 Hz for
exceptional dial tone rejection. Each filter output is
followed by a single order switched capacitor filter
section, which smooths the signals prior to limiting.
Limiting is performed by high-gain comparators
which are provided with hysteresis to prevent
detection of unwanted low-level signals. The outputs
of the comparators provide full rail logic swings at
the frequencies of the incoming DTMF signals.
Figure 3 - Single-Ended Input Configuration
C
RIN
RF
IN+
IN-
GS
VRef
VOLTAGE GAIN
(AV) = RF / RIN
MT8889C/
MT8889C-1
Figure 4 - Differential Input Configuration
0= LOGIC LOW, 1= LOGIC HIGH
Table 1. Functional Encode/Decode Table
FLOW
FHIGH
DIGIT
D3
D2
D1
D0
697
1209
1
0
0
0
1
697
1336
2
0
0
1
0
697
1477
3
0
0
1
1
770
1209
4
0
1
0
0
770
1336
5
0
1
0
1
770
1477
6
0
1
1
0
852
1209
7
0
1
1
1
852
1336
8
1
0
0
0
852
1477
9
1
0
0
1
941
1336
0
1
0
1
0
941
1209
*
1
0
1
1
941
1477
#
1
1
0
0
697
1633
A
1
1
0
1
770
1633
B
1
1
1
0
852
1633
C
1
1
1
1
941
1633
D
0
0
0
0
C1
C2
R1
R2
R3
R4
R5
IN+
IN-
GS
VRef
MT8889C/
DIFFERENTIAL INPUT AMPLIFIER
C1 = C2 = 10 nF
R1 = R4 = R5 = 100 k
R2 = 60k
Ω, R3 = 37.5 kΩ
R3 = (R2R5)/(R2 + R5)
VOLTAGE GAIN
(AV diff) - R5/R1
INPUT IMPEDANCE
(ZINdiff) = 2 R1
2 + (1/
ωC)2
MT8889C-1


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